* RE: ARM instructions -- CLZ
@ 2000-11-19 23:42 Clive Davies
2000-11-20 2:09 ` Richard Earnshaw
0 siblings, 1 reply; 3+ messages in thread
From: Clive Davies @ 2000-11-19 23:42 UTC (permalink / raw)
To: 'Shaun Jackman', crossgcc; +Cc: sdj
clz is not an ARM instruction, so it won't be supported.
Clive
> -----Original Message-----
> From: Shaun Jackman [ mailto:sjackman@pathwayconnect.com ]
> Sent: 17 November 2000 19:07
> To: crossgcc@sources.redhat.com
> Cc: sdj@sfu.ca
> Subject: ARM instructions -- CLZ
>
>
> Does binutils support the ARM CLZ instruction?
> I have an arm7tdmi and am compiling with -mcpu-arm7tdmi.
>
> This is the macro I'm using...
>
> #define count_leading_zeroes(a) \
> ({ uint32 __value, __arg = (a); \
> asm ("clz\t%0, %1": "=r" (__value): "r" (__arg)); \
> __value; })
>
> and the C is...
>
> unsigned count = count_leading_zeroes( num);
>
> which produces the proper assembler (in the .s file compiling with -S)
> clz r2, r3
> (which makes sense in context)
>
> Unfortunately, it's a big crash and burn.
> /tmp/ccQbzMp6.s: Assembler messages:
> /tmp/ccQbzMp6.s:17: Error: bad instruction `clz r2,r3'
>
> Any thoughts?
>
> Thanks,
> Shaun Jackman
>
>
> ------
> Want more information? See the CrossGCC FAQ,
http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
------
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: ARM instructions -- CLZ
2000-11-19 23:42 ARM instructions -- CLZ Clive Davies
@ 2000-11-20 2:09 ` Richard Earnshaw
0 siblings, 0 replies; 3+ messages in thread
From: Richard Earnshaw @ 2000-11-20 2:09 UTC (permalink / raw)
To: Clive Davies; +Cc: rearnsha
Not quite. CLZ is part of the Architecture v5 extensions to the ARM. It
will be added when v5 support goes in. Note, the arm7tdmi is architecture
v4, so won't have CLZ.
Richard.
> clz is not an ARM instruction, so it won't be supported.
>
> Clive
>
> > -----Original Message-----
> > From: Shaun Jackman [ mailto:sjackman@pathwayconnect.com ]
> > Sent: 17 November 2000 19:07
> > To: crossgcc@sources.redhat.com
> > Cc: sdj@sfu.ca
> > Subject: ARM instructions -- CLZ
> >
> >
> > Does binutils support the ARM CLZ instruction?
> > I have an arm7tdmi and am compiling with -mcpu-arm7tdmi.
> >
> > This is the macro I'm using...
> >
> > #define count_leading_zeroes(a) \
> > ({ uint32 __value, __arg = (a); \
> > asm ("clz\t%0, %1": "=r" (__value): "r" (__arg)); \
> > __value; })
> >
> > and the C is...
> >
> > unsigned count = count_leading_zeroes( num);
> >
> > which produces the proper assembler (in the .s file compiling with -S)
> > clz r2, r3
> > (which makes sense in context)
> >
> > Unfortunately, it's a big crash and burn.
> > /tmp/ccQbzMp6.s: Assembler messages:
> > /tmp/ccQbzMp6.s:17: Error: bad instruction `clz r2,r3'
> >
> > Any thoughts?
> >
> > Thanks,
> > Shaun Jackman
> >
> >
> > ------
> > Want more information? See the CrossGCC FAQ,
> http://www.objsw.com/CrossGCC/
> Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
>
> ------
> Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
> Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
>
------
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^ permalink raw reply [flat|nested] 3+ messages in thread
* ARM instructions -- CLZ
@ 2000-11-17 11:05 Shaun Jackman
0 siblings, 0 replies; 3+ messages in thread
From: Shaun Jackman @ 2000-11-17 11:05 UTC (permalink / raw)
To: crossgcc; +Cc: sdj
Does binutils support the ARM CLZ instruction?
I have an arm7tdmi and am compiling with -mcpu-arm7tdmi.
This is the macro I'm using...
#define count_leading_zeroes(a) \
({ uint32 __value, __arg = (a); \
asm ("clz\t%0, %1": "=r" (__value): "r" (__arg)); \
__value; })
and the C is...
unsigned count = count_leading_zeroes( num);
which produces the proper assembler (in the .s file compiling with -S)
clz r2, r3
(which makes sense in context)
Unfortunately, it's a big crash and burn.
/tmp/ccQbzMp6.s: Assembler messages:
/tmp/ccQbzMp6.s:17: Error: bad instruction `clz r2,r3'
Any thoughts?
Thanks,
Shaun Jackman
------
Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
^ permalink raw reply [flat|nested] 3+ messages in thread
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