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* Re: gcc compile
@ 2001-01-23  9:21 Jens-Christian Lache
  2001-01-23  9:29 ` Philip Blundell
  2001-04-01  0:00 ` Jens-Christian Lache
  0 siblings, 2 replies; 64+ messages in thread
From: Jens-Christian Lache @ 2001-01-23  9:21 UTC (permalink / raw)
  To: crossgcc, gdb

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
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Hi everybody!

Since a few day´s I try to make software trap´s using "swi" on the ARM
simulator build in gdb. I have tested the code on "real" hardware, it worked
fine. My hardware has a monitor program (angel), which is initializing the
superuser side and switches the proc to user mode before starting the
code at "start" from the crt0.S file.

I still can´t do these sw traps on the simulator. I get:

unknown SWI encountered - 1 - ignoring
unknown SWI encountered - 2 - ignoring
unknown SWI encountered - 3 - ignoring
unknown SWI encountered - 4 - ignoring

for
asm volatile (".equ REASON_CHANGE_TO_SV, 0x0");
asm volatile (".equ REASON_SET_I, 0x1");
asm volatile (".equ REASON_UNSET_I, 0x2");
asm volatile (".equ REASON_SET_F, 0x3");
asm volatile (".equ REASON_UNSET_F, 0x4");
asm volatile ("swi  #REASON_CHANGE_TO_SV");
asm volatile ("swi  #REASON_SET_I");
asm volatile ("swi  #REASON_UNSET_I");
asm volatile ("swi  #REASON_SET_F");

(it does not complain about "swi 0x0", if you may have noticed). I am sure that
it does not enter the function 

Dump of assembler code for function swi_wrapper__Fv:
0x2018ee8 <swi_wrapper__Fv>:	stmdb	sp!, {r0, r1, r2, r3, lr}
0x2018eec <swi_wrapper__Fv+4>:	ldr	r0, [lr, -#4]
0x2018ef0 <swi_wrapper__Fv+8>:	bic	r0, r0, #-16777216	; 0xff000000
0x2018ef4 <swi_wrapper__Fv+12>:	mov	r1, sp
0x2018ef8 <swi_wrapper__Fv+16>:	mrs	r2, SPSR
0x2018efc <swi_wrapper__Fv+20>:	stmdb	sp!, {r2}
0x2018f00 <swi_wrapper__Fv+24>:	bl	0x2018d08 <swi_handler__FiPUi>
0x2018f04 <swi_wrapper__Fv+28>:	ldmia	sp!, {r2}
0x2018f08 <swi_wrapper__Fv+32>:	msr	SPSR_fc, r2
0x2018f0c <swi_wrapper__Fv+36>:	ldmia	sp!, {r0, r1, r2, r3, pc}
End of assembler dump.

which is initialized by

memPointer = TABLE_ENTRY_SWI_HANDLER_ADDRESS; // 0x20
*memPointer = (int) swi_wrapper;
memPointer = JUMP_DESTINATION_SWI; // 0x8
*memPointer= 0xe59ff010;

The swi_wrapper leads to :

void swi_handler(int swi_number, unsigned int * stack ) {
 	38	  static Logger swiLogger((int *) 0x100, (int *) 0x200);  
 	39	  int cpsr;
 	40	
-	41	  switch(swi_number) {
 	42	  case REASON_CHANGE_TO_SV :
-	43	    os->osLogger->log("REASON_CHANGE_TO_SV",0);
-	44	    break;
 	45	  case REASON_SET_I:
-	46	    asm volatile ("mrs r0,cpsr": : :"r0");
-	47	    asm volatile ("orr r0, r0, #128": : :"r0");
-	48	    asm volatile ("msr cpsr, r0");
-	49	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	50	    os->osLogger->log("REASON_SET_I",cpsr);
-	51	    break;
 	52	  case REASON_UNSET_I:
-	53	    asm volatile ("mrs r0,cpsr": : :"r0");
-	54	    asm volatile ("and r0, r0, #0xffff7fff": : :"r0");
-	55	    asm volatile ("msr cpsr, r0");
-	56	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	57	    os->osLogger->log("REASON_UNSET_I",cpsr);
-	58	    break;
 	59	  case REASON_SET_F:
-	60	    asm volatile ("mrs r0,cpsr": : :"r0");
-	61	    asm volatile ("orr r0, r0, #64": : :"r0");
-	62	    asm volatile ("msr cpsr, r0");
-	63	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	64	    os->osLogger->log("REASON_SET_F",cpsr);
-	65	    break;
 	66	  case REASON_UNSET_F:
-	67	    asm volatile ("mrs r0,cpsr": : :"r0");
-	68	    asm volatile ("and r0, r0, #0xffffbfff": : :"r0");
-	69	    asm volatile ("msr cpsr, r0");
-	70	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	71	    os->osLogger->log("REASON_UNSET_F",cpsr);
-	72	    break;
 	73	  default :
-	74	    break;

The logging facility is tested and works fine on the aeb.

Is there still an error in the crt0.S file or could this be a bug of the gdb?
Thank´s for your patience with me :-),
Jens-Christian 
P.S.:
The beginning of the crt0.S file with my modification:

//#include "swi.h"

/* ANSI concatenation macros.  */
#define CONCAT(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b

#ifdef __USER_LABEL_PREFIX__
#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
#else
#error __USER_LABEL_PREFIX is not defined
#endif

/* .text is used instead of .section .text so it works with arm-aout too.  */
	.text
	.code 32
	.align 	0

	.global	_mainCRTStartup
	.global	_start
	.global	start
start:
_start:
_mainCRTStartup:

/* Start by setting up a stack */
#ifdef ARM_RDP_MONITOR
	/*  Issue Demon SWI to read stack info */
	swi	SWI_GetEnv	/*  Returns command line in r0 */
	mov	sp,r1		/*  and the highest memory address in r1 */
	ldr	sl, .LC2	/*  stack limit is at end of data */
	add	sl, sl, #256	/*  allow slop for stack overflow handling */
				/*  and small frames */
#else
#ifdef ARM_RDI_MONITOR
	/*  Issue Angel SWI to read stack info */
	mov	r0, #AngelSWI_Reason_HeapInfo
	adr	r1, .LC0	/*  point at ptr to 4 words to receive data */
	swi	AngelSWI_ARM	/*  We are always in ARM mode for startup */
	ldr	r0, .LC0	/*  point at values read */
	ldr	sp, [r0, #8]
	ldr	sl, [r0, #12]
	add	sl, sl, #256	/*  allow slop for stack overflow handling */
				/*  and small frames */
#else
	/*  Set up the stack pointer to a fixed value */
	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
	@	modification, jens-christian
	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
	@ begin
	// switch to user mode
	.equ MODE_BITS,        0x1F @ all mode bits from cpsr
	.equ USER_MODE,        0x10 @ b10000 is user mode
	
#ifdef TARGET_SIM
	@ initialize the stack pointer
	@ for SV mode
	@ set sp to the end of the RAM (eb01)
	mov	sp, #0x1000

	// switch to user mode
	mrs	r0, cpsr
	bic	r0, r0, #MODE_BITS
	orr	r0, r0, #USER_MODE
	msr	cpsr, r0
#endif //TARGET_SIM

	@ end
	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
	ldr	r3, .LC0
	mov 	sp, r3
	/* Setup a default stack-limit in-case the code has been

 -- 


Jens-Christian Lache
Technische Universitaet Hamburg-Harburg
www.tu-harburg.de/~sejl1601
Mail:
lache@tu-harburg.de
lache@ngi.de
Tel.:
+0491759610756

------
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^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-22  7:08 Yves Rutschle
  2001-04-01  0:00 ` Yves Rutschle
  0 siblings, 1 reply; 64+ messages in thread
From: Yves Rutschle @ 2001-01-22  7:08 UTC (permalink / raw)
  To: 'Jens-Christian Lache', 'crossgcc@sources.redhat.com'

> Even at the beginning of "start" the cpsr is equal to 0x10;
> 
> I have added a mode switch to user mode to crt0.S
> and will install the proposed swi handler.


Aha, good one, I didn't think about that. An ARM core starts
up in SVC (otherwise you can't setup anything). So you need
to switch to usermode indeed.

Probably your hardware initialisation was setting user
mode without your knowing, whereas the simulator only does
what you tell it to do.

Cheers,
Y.


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^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-22  4:27 Yves Rutschle
  2001-01-22  4:41 ` Jens-Christian Lache
                   ` (2 more replies)
  0 siblings, 3 replies; 64+ messages in thread
From: Yves Rutschle @ 2001-01-22  4:27 UTC (permalink / raw)
  To: 'Jens-Christian Lache'; +Cc: 'crossgcc@sources.redhat.com'

Hallo,

> I have tested the code on the eb01. After swi the proc is in SV.

Therefore it's not because of the simulator :)

> 0x2018d28 <swi_handler__Fi>:	mov	r12, sp
> 0x2018d2c <swi_handler__Fi+4>:	stmdb	sp!, {r11, r12, lr, pc}
> 0x2018d30 <swi_handler__Fi+8>:	sub	r11, r12, #4	; 0x4
> 0x2018d34 <swi_handler__Fi+12>:	sub	sp, sp, #12	; 0xc
[snipped swi routine]
> 0x2018d98 <swi_handler__Fi+112>:	ldmdb	r11, {r11, sp, pc}

This code won't set CPSR back to SPSR; Try to add a hat
at the end of the return instruction:
	ldmdb r11, {r11, sp, pc}^
(the hat activates the copy of SPSR to CPSR same as movs pc,lr)

>Don?t know what I am doing wrong. This does also not work:
>void swi_handler(int reason) {
>  switch(reason) {
>  case REASON_CHANGE_TO_SV :
>    asm volatile ("mrs r0,cpsr": : :"r0");
>    asm volatile ("orr r0, r0, #192": : :"r0");
>    asm volatile ("msr cpsr, r0");
>  default :
>    break;
>  }
>  asm volatile("movs    pc, lr");
>}

Huh. What do you think happens to the stack when you leave
like that? :-) (hint: you pushed 4 registers when entering
the routine...)

I don't think you can create a whole swi handler in C (unless
gcc has extensions I don't know about. the arm C doesn't
anyway).

I'd advise you to use an assembly top-level handler such
as:

	stmdf sp!, {r0-r3, lr}
	ldr	r0, [lr,#-4]
	bic	r0, r0, #0xff000000
	mov	r1, sp			; r1 = SWI number
	mrs	r2, spsr
	stmfd	sp!, {r2}			; keep spsr in case of nested swi's
	bl	C_Handler
	ldmfd	sp!, {r2}
	msr	spsr, r2			; restore spsr
	ldmfd	sp!, {r0-r3, pc}^		; return, restore cpsr from spsr

(this is straight from ADS' developer guide, by the way)

Then your C handler looks like:

void C_Handler( int swi_number, unsigned int * stack )
{
    printf( "got swi %d\n", swi_number );
}

Hope that helps!

Yves.






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^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-22  3:45 Yves Rutschle
  2001-01-22  3:58 ` Jens-Christian Lache
                   ` (3 more replies)
  0 siblings, 4 replies; 64+ messages in thread
From: Yves Rutschle @ 2001-01-22  3:45 UTC (permalink / raw)
  To: 'Jens-Christian Lache', 'Philip Blundell'
  Cc: 'crossgcc@sources.redhat.com'

> Unfortunately the ARM simulator does not support the several 
> CPU modes, that
> the ARM7TDMI has. I made a software trap using "swi", and the 
> pc was set
> correctly to 0x8. It did also execute the jump instruction 
> from this place
> leading to my own swi handler. But when leaving it, returning to the
> code containing the swi, the mode was still 0x10, which is 
> not supervisor
> mode. 


How do you return from your SWI handler? Don't forget
you have to make
	movs	pc, lr
to copy SPSR in CPSR at the same time you return, so
the mode gets changed.

CPU modes have been in existence since the very beginning
of the ARM cores, so I doubt it's not supported!

Cheers,
Yves



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^ permalink raw reply	[flat|nested] 64+ messages in thread
[parent not found: <718D38CAB6E0D011B2C90060970C28A56425F0@EXCHANGESERVER>]
* RE: gcc compile
@ 2001-01-19  2:29 David Korn
  2001-01-20  9:51 ` Philip Blundell
  2001-04-01  0:00 ` David Korn
  0 siblings, 2 replies; 64+ messages in thread
From: David Korn @ 2001-01-19  2:29 UTC (permalink / raw)
  To: crossgcc

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
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    Hi Jens,

  To the best of my knowledge there is only a ppc target simulator for gdb.
I don't know what you are referring to when you say "That´s why the code
crashes on the simulator"; is it that you have an ARM simulator that is
separate from the GNU software, maybe a commercial product?


         DaveK
-- 
The Boulder Pledge: "Under no circumstances will I ever purchase anythingo
 ffered to me as the result of an unsolicited email message. Nor will I 
forward chain letters, petitions, mass mailings, or virus warnings to largen
 umbers of others. This is my contribution to the survival of the online
community." 

>-----Original Message-----
>From: Jens-Christian Lache [ mailto:lache@tu-harburg.de ]
>Sent: 19 January 2001 10:11
>To: David Korn
>Subject: RE: gcc compile
>
>
>Hi! Do you know, what should I do if I want to use target
>simulator in arm-elf-gdb debugger? 
>Normally I use have a monitor program,
>which handles software traps. 
>That´s why the code crashes on the simulator.
>
>Is there s.th. similar to the "sim" option for arm?
>jens-christian
>Am Fre, 19 Jan 2001 schrieben Sie:
>> >-----Original Message-----
>> >From: Helmut Kolb [ mailto:Helmut.Kolb@knapp.com ]
>> 
>> >I am unable to find such a think (which sounds nice) in my 
>version of
>> >gcc, which i compiled for i960 about a year ago:
>> >,----------------------------- [ gcc -v ] 
>-----------------------------
>> >| Reading specs from
>> >| 
>/usr/local/i960/compiler/lib/gcc-lib/i960-unknown-coff/2.95.2/specs
>> >| gcc version 2.95.2 19991024 (release)
>> 
>>`-------------------------------------------------------------
>---------
>> >2.92.2 shoudn't be sooo old - right?
>> >
>> >Is the "sim" option a new feature, a special patch, or 
>something enabled
>> >for some special cpus?
>> 
>>   Yep.  Sorry, but it's for powerpc only.  The GDB debugger 
>comes with a 
>> ppc simulator, and the -sim flag compiles code to run with 
>it.  There aren't
>> simulators for any other cpus.  This is from the "IBM 
>RS/6000 and PowerPC
>> Options" section of the manual:
>> 
>> ----------snip!--------------
>> -msim 
>> On embedded PowerPC systems, assume that the startup module is called
>> `sim-crt0.o' and the standard C libraries are `libsim.a' and 
>`libc.a'. This
>> is default for `powerpc-*-eabisim' configurations. 
>> ----------snip!--------------
>> 
>>        DaveK
>> -- 
>> The Boulder Pledge: "Under no circumstances will I ever 
>purchase anything 
>> offered to me as the result of an unsolicited email message. 
>Nor will I 
>> forward chain letters, petitions, mass mailings, or virus 
>warnings to large 
>> numbers of others. This is my contribution to the survival 
>of the online
>> community."
>> 
>> 
>> 
>**********************************************************************
>> This email and any files transmitted with it are confidential and
>> intended solely for the use of the individual or entity to whom they
>> are addressed. If you have received this email in error please notify
>> the system manager.
>> 
>> This footnote also confirms that this email message has been swept by
>> MIMEsweeper for the presence of computer viruses.
>> 
>> www.mimesweeper.com
>> 
>**********************************************************************
>> 
>> ------
>> Want more information?  See the CrossGCC FAQ, 
> http://www.objsw.com/CrossGCC/
>> Want to unsubscribe? Send a 
>note to crossgcc-unsubscribe@sourceware.cygnus.com
>-- 
>
>
>Jens-Christian Lache
>Technische Universitaet Hamburg-Harburg
>www.tu-harburg.de/~sejl1601
>Mail:
>lache@tu-harburg.de
>lache@ngi.de
>Tel.:
>+0491759610756
>


**********************************************************************
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are addressed. If you have received this email in error please notify
the system manager.

This footnote also confirms that this email message has been swept by
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^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-19  2:21 Jens-Christian Lache
  2001-01-19  2:58 ` Pierre Saucourt-Harmel (r54698)
  2001-04-01  0:00 ` Jens-Christian Lache
  0 siblings, 2 replies; 64+ messages in thread
From: Jens-Christian Lache @ 2001-01-19  2:21 UTC (permalink / raw)
  To: crossgcc

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 3096 bytes --]

Hi! Do you know, what should I do if I want to use target
simulator in arm-elf-gdb debugger? 
Normally I use have a monitor program,
which handles software traps. 
That´s why the code crashes on the simulator.

Is there s.th. similar to the "sim" option for arm?
jens-christian
Am Fre, 19 Jan 2001 schrieben Sie:
> >-----Original Message-----
> >From: Helmut Kolb [ mailto:Helmut.Kolb@knapp.com ]
> 
> >I am unable to find such a think (which sounds nice) in my version of
> >gcc, which i compiled for i960 about a year ago:
> >,----------------------------- [ gcc -v ] -----------------------------
> >| Reading specs from
> >| /usr/local/i960/compiler/lib/gcc-lib/i960-unknown-coff/2.95.2/specs
> >| gcc version 2.95.2 19991024 (release)
> >`----------------------------------------------------------------------
> >2.92.2 shoudn't be sooo old - right?
> >
> >Is the "sim" option a new feature, a special patch, or something enabled
> >for some special cpus?
> 
>   Yep.  Sorry, but it's for powerpc only.  The GDB debugger comes with a 
> ppc simulator, and the -sim flag compiles code to run with it.  There aren't
> simulators for any other cpus.  This is from the "IBM RS/6000 and PowerPC
> Options" section of the manual:
> 
> ----------snip!--------------
> -msim 
> On embedded PowerPC systems, assume that the startup module is called
> `sim-crt0.o' and the standard C libraries are `libsim.a' and `libc.a'. This
> is default for `powerpc-*-eabisim' configurations. 
> ----------snip!--------------
> 
>        DaveK
> -- 
> The Boulder Pledge: "Under no circumstances will I ever purchase anything 
> offered to me as the result of an unsolicited email message. Nor will I 
> forward chain letters, petitions, mass mailings, or virus warnings to large 
> numbers of others. This is my contribution to the survival of the online
> community."
> 
> 
> **********************************************************************
> This email and any files transmitted with it are confidential and
> intended solely for the use of the individual or entity to whom they
> are addressed. If you have received this email in error please notify
> the system manager.
> 
> This footnote also confirms that this email message has been swept by
> MIMEsweeper for the presence of computer viruses.
> 
> www.mimesweeper.com
> **********************************************************************
> 
> ------
> Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
> Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
-- 


Jens-Christian Lache
Technische Universitaet Hamburg-Harburg
www.tu-harburg.de/~sejl1601
Mail:
lache@tu-harburg.de
lache@ngi.de
Tel.:
+0491759610756
-------------------------------------------------------

-- 


Jens-Christian Lache
Technische Universitaet Hamburg-Harburg
www.tu-harburg.de/~sejl1601
Mail:
lache@tu-harburg.de
lache@ngi.de
Tel.:
+0491759610756

------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com

^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-19  1:56 David Korn
  2001-04-01  0:00 ` David Korn
  0 siblings, 1 reply; 64+ messages in thread
From: David Korn @ 2001-01-19  1:56 UTC (permalink / raw)
  To: 'koh@knapp.com', Hua Ji; +Cc: crossgcc

>-----Original Message-----
>From: Helmut Kolb [ mailto:Helmut.Kolb@knapp.com ]

>I am unable to find such a think (which sounds nice) in my version of
>gcc, which i compiled for i960 about a year ago:
>,----------------------------- [ gcc -v ] -----------------------------
>| Reading specs from
>| /usr/local/i960/compiler/lib/gcc-lib/i960-unknown-coff/2.95.2/specs
>| gcc version 2.95.2 19991024 (release)
>`----------------------------------------------------------------------
>2.92.2 shoudn't be sooo old - right?
>
>Is the "sim" option a new feature, a special patch, or something enabled
>for some special cpus?

  Yep.  Sorry, but it's for powerpc only.  The GDB debugger comes with a 
ppc simulator, and the -sim flag compiles code to run with it.  There aren't
simulators for any other cpus.  This is from the "IBM RS/6000 and PowerPC
Options" section of the manual:

----------snip!--------------
-msim 
On embedded PowerPC systems, assume that the startup module is called
`sim-crt0.o' and the standard C libraries are `libsim.a' and `libc.a'. This
is default for `powerpc-*-eabisim' configurations. 
----------snip!--------------

       DaveK
-- 
The Boulder Pledge: "Under no circumstances will I ever purchase anything 
offered to me as the result of an unsolicited email message. Nor will I 
forward chain letters, petitions, mass mailings, or virus warnings to large 
numbers of others. This is my contribution to the survival of the online
community."


**********************************************************************
This email and any files transmitted with it are confidential and
intended solely for the use of the individual or entity to whom they
are addressed. If you have received this email in error please notify
the system manager.

This footnote also confirms that this email message has been swept by
MIMEsweeper for the presence of computer viruses.

www.mimesweeper.com
**********************************************************************

------
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Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com

^ permalink raw reply	[flat|nested] 64+ messages in thread
* RE: gcc compile
@ 2001-01-18 15:43 Hua Ji
  2001-01-18 22:35 ` Helmut Kolb
  2001-04-01  0:00 ` Hua Ji
  0 siblings, 2 replies; 64+ messages in thread
From: Hua Ji @ 2001-01-18 15:43 UTC (permalink / raw)
  To: 'gerrit.haase@t-online.de', s.andres; +Cc: crossgcc

 

Sascha Andres schrieb:
> hi,
> i've build the gcc with the following command line:
> 
> there is no crt0.o for arm-elf in the/tools dir.
> so how to compile the missing file(s) ?

>You need to build a cross-newlib too?

Hua: I guess this is no special related to newlib, but with that he didn't
explicitely specify an target OS. With arm-elf configurations, system will
not **AUTOMATICALLY* go for the __start symbol and other part, which is used
for initialization before cpu gives control to __main entry. 

My (personal) suggestion is: This is not a error. Leave it, if you are doing
your coding for the raw board without any os support(like linux).

For testing, you can use gcc -msim...., so that you will no problem for
creating an executable and can be run with the powerpc-arm-elf-run, which
should be located in your ./bin directory. 

For real development, sure we need provide a start.S in which the __start
entry will be provided. So that our codes can be deploed onto the RAW board.

Wish I am correct(keep my fingers crossed). However, folks, do point out if
I am wrong. I just wish we can grow together!

Hua

------
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^ permalink raw reply	[flat|nested] 64+ messages in thread
* gcc compile
@ 2001-01-18  9:27 Sascha Andres
  2001-01-18 13:39 ` Jonathan Larmour
                   ` (2 more replies)
  0 siblings, 3 replies; 64+ messages in thread
From: Sascha Andres @ 2001-01-18  9:27 UTC (permalink / raw)
  To: crossgcc

 
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

hi,
i've build the gcc with the following command line:

/src/gcc/gcc-2.95.2/configure --target=arm-elf \
    --prefix=/tools \
    --exec-prefix=/tools/H-i686-pc-linux-gnu \
    --with-gnu-as --with-gnu-ld --with-newlib \
    --nfp \
   -v 2>&1 | tee configure.out
make -w all-gcc install-gcc \
    LANGUAGES="c c++" 2>&1 | tee make.out

the binutils are build without any errors and this
runs through too. but when compiling a simple c file
i get the message

'crt0.o not found.'.

there is no crt0.o for arm-elf in the/tools dir.
so how to compile the missing file(s) ?

sascha

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^ permalink raw reply	[flat|nested] 64+ messages in thread
end of thread, other threads:[~2001-04-01  0:00 UTC | newest]

Thread overview: 64+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2001-01-23  9:21 gcc compile Jens-Christian Lache
2001-01-23  9:29 ` Philip Blundell
2001-04-01  0:00   ` Philip Blundell
2001-04-01  0:00 ` Jens-Christian Lache
  -- strict thread matches above, loose matches on Subject: below --
2001-01-22  7:08 Yves Rutschle
2001-04-01  0:00 ` Yves Rutschle
2001-01-22  4:27 Yves Rutschle
2001-01-22  4:41 ` Jens-Christian Lache
2001-04-01  0:00   ` Jens-Christian Lache
2001-01-22 13:38 ` Philip Blundell
2001-01-23  2:18   ` Richard Earnshaw
2001-01-23  2:26     ` Philip Blundell
2001-04-01  0:00       ` Philip Blundell
2001-04-01  0:00     ` Richard Earnshaw
2001-04-01  0:00   ` Philip Blundell
2001-04-01  0:00 ` Yves Rutschle
2001-01-22  3:45 Yves Rutschle
2001-01-22  3:58 ` Jens-Christian Lache
2001-04-01  0:00   ` Jens-Christian Lache
2001-01-22  4:07 ` Jens-Christian Lache
2001-04-01  0:00   ` Jens-Christian Lache
2001-01-22  4:37 ` Jens-Christian Lache
2001-04-01  0:00   ` Jens-Christian Lache
2001-04-01  0:00 ` Yves Rutschle
     [not found] <718D38CAB6E0D011B2C90060970C28A56425F0@EXCHANGESERVER>
2001-01-19  2:49 ` Jens-Christian Lache
2001-04-01  0:00   ` Jens-Christian Lache
2001-01-19  2:29 David Korn
2001-01-20  9:51 ` Philip Blundell
2001-01-20 17:15   ` David Feustel
2001-01-21  1:51     ` Philip Blundell
2001-04-01  0:00       ` Philip Blundell
2001-04-01  0:00     ` David Feustel
2001-01-22  2:53   ` Jens-Christian Lache
2001-01-22  3:08     ` Philip Blundell
2001-01-22  7:00       ` Jens-Christian Lache
2001-04-01  0:00         ` Jens-Christian Lache
2001-04-01  0:00       ` Philip Blundell
2001-01-22  3:22     ` Richard Earnshaw
2001-04-01  0:00       ` Richard Earnshaw
2001-04-01  0:00     ` Jens-Christian Lache
2001-04-01  0:00   ` Philip Blundell
2001-04-01  0:00 ` David Korn
2001-01-19  2:21 Jens-Christian Lache
2001-01-19  2:58 ` Pierre Saucourt-Harmel (r54698)
2001-04-01  0:00   ` Pierre Saucourt-Harmel (r54698)
2001-04-01  0:00 ` Jens-Christian Lache
2001-01-19  1:56 David Korn
2001-04-01  0:00 ` David Korn
2001-01-18 15:43 Hua Ji
2001-01-18 22:35 ` Helmut Kolb
2001-01-19  3:13   ` Kai Ruottu
2001-04-01  0:00     ` Kai Ruottu
2001-04-01  0:00   ` Helmut Kolb
2001-04-01  0:00 ` Hua Ji
2001-01-18  9:27 Sascha Andres
2001-01-18 13:39 ` Jonathan Larmour
2001-04-01  0:00   ` Jonathan Larmour
2001-01-18 15:23 ` Gerrit Peter Haase
2001-01-22  0:19   ` Sascha Andres
2001-01-22  2:43     ` Jens-Christian Lache
2001-04-01  0:00       ` Jens-Christian Lache
2001-04-01  0:00     ` Sascha Andres
2001-04-01  0:00   ` Gerrit Peter Haase
2001-04-01  0:00 ` Sascha Andres

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