From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from omta002.cacentral1.a.cloudfilter.net (omta002.cacentral1.a.cloudfilter.net [3.97.99.33]) by sourceware.org (Postfix) with ESMTPS id 5DA123858D28 for ; Sat, 4 Mar 2023 18:16:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5DA123858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=Shaw.ca Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=shaw.ca Received: from shw-obgw-4003a.ext.cloudfilter.net ([10.228.9.183]) by cmsmtp with ESMTP id YNz4pxBaojvm1YWQbpAcoc; Sat, 04 Mar 2023 18:16:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=shaw.ca; s=s20180605; t=1677953777; bh=Ta/epCXtKWYb7mC6CIxa95bqcbwxvC4193hRJc3WGIk=; h=From:To:Reply-To:Date:Subject; b=Szr+Ok6jpqkHegyW2DlLJqfCAo/C8Q/+FEDsj+hrgzF9myKX91+DMPEJ8/QNKRVfE 9DAyI9iwlaa2gejacliLsJlnI9mo+1hWiksGfyOQ5o3exFZcvK+9GpCeJJI9I6gu+3 OkUgqEXcld4AOSs9X5J+yicLJdyTBU38DXhcO82wAdf6joygQrBq8UHbJRp1LvCULx ZQ2Stqstb3UGqynLd1lY/mW7a68xyGBToEOE7BoD431OUriyMkVm6pyOp3EmoEypnd jQ86XTYLwK67ZrkPMQExILNK1LI8edBiFuTCCH2T+zc5ta17bcE3fa+XDQm18+RpcJ UxBvn8Z48u18A== Received: from localhost.localdomain ([184.64.102.149]) by cmsmtp with ESMTP id YWQbpx08jcyvuYWQbpgIuH; Sat, 04 Mar 2023 18:16:17 +0000 X-Authority-Analysis: v=2.4 cv=VbHkgXl9 c=1 sm=1 tr=0 ts=64038af1 a=DxHlV3/gbUaP7LOF0QAmaA==:117 a=DxHlV3/gbUaP7LOF0QAmaA==:17 a=5_s1rtZIAAAA:8 a=uFCJ_2VaAAAA:8 a=QxfxBPMmjNCev-bdcbAA:9 a=7-3sKM-zqIYA:10 a=3dMv4P1n_z9a81GE33Fp:22 a=XJpU44A2SGp3j-UIhlXx:22 From: "Cygwin cpuid Maintainer" To: "Cygwin Announcements" Reply-To: "Cygwin" Date: Sat, 04 Mar 2023 11:14:34 -0700 Message-Id: <20230304111434.11956-1-Brian.Inglis@Shaw.ca> Subject: Updated: cpuid 20230228 X-CMAE-Envelope: MS4xfOo5KB6vA7Ut1wsh+Yag/m3wnNR1bgWJgEqc+vO0LdM9/A2MP6EVxsmNHwn6sMQVreX0aTrQJ9AccyDTnllZ5NiSxfuEnTge8MPkh9TPOSZI6/tHGwfe 7+J81aaQkZdP1rmPP2Es+zf9N/bS+bbgnEpY88JxIB/r8ID1b2V5qYEbUwFvRSDVbJz9ysr+T7ERzG0A7XSggILxLtYlI31tBBU= X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,KAM_NUMSUBJECT,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The following package has been upgraded in the Cygwin distribution: * cpuid 20230228 Displays detailed information about the CPU(s) gathered from the CPUID instruction, and also determines the exact model of CPU(s). Whereas /proc/cpuinfo is like an abstract of the features important to Linux in a system, cpuid is a standalone utility which writes a paper expounding on every feature in each CPU's architecture and what it can do, at about the one line per bit level. It is updated and released frequently to stay current with Intel and AMD information and supports other vendors' chips. See the project home page for more information: http://etallen.com/cpuid.html For information about changes since the previous Cygwin release, see below or /usr/share/doc/cpuid/ChangeLog after installation. Tue Feb 28 2023 20230228 * cpuid.man: Added Intel Flexible Return and Event Deliver (FRED). * cpuid.c: - Corrected 7/1/eax fast REP instructions, where I'd left the REP prefix out of the description. - Added 7/1/eax FRED & LKGS bits, from Intel Flexible Return and Event Deliver (FRED). - Clarified 7/1/eax ArchPerfmonExt, which indicates that leaf 0x23 is valid. - Added (uarch synth) decoding for AMD Ryzen (Phoenix E0), based on sample from bakerlab.org, which I missed on Oct 3 2022, when I added the (synth) decoding. - Added 0x80000001/ebx PkgType decoding for AMD (10,15) Family 19h CPUs: (2,1) Vermeer, (5,1) Cezanne/Barcelo, (6,1) Raphael, and (7,0) Phoenix, based on their respective PPPR's. - Added very early (synth) decoding for Lunar Lake. There is no corresponding (uarch synth) decoding, because no name is yet known for the uarch. - Added (0,6),(9,10) Alder Lake Core names: i*-12000. - Differentiate (0,6),(9,7) & (0,6),(9,10) Alder Lake Gracemont E-cores from Golden Cove P-cores. - Differentiate (0,6),(11,7); (0,6),(11,10) & (0,6),(11,15) Raptor Lake Gracemont E-cores from Raptor Cove P-cores. - Added (synth) & (uarch synth) decoding for (10,15),(7,8) Phoenix 2, from Coreboot*. - Renamed print_hypervisor_3_eax_xen to print_hypervisor_3_0_eax_xen. - Added print_hypervisor_3_0_ebx_xen and decode Xen tsc mode. - Added (synth) decoding for (10,15),(6,1,1) Raphael B1.