From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2155) id 7FF9D3858C5F; Mon, 18 Mar 2024 22:39:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7FF9D3858C5F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1710801557; bh=Rk7Fm5diDKPYyz8rLAW3oISOrJiWfzgziqLfGTd00A4=; h=From:To:Subject:Date:From; b=AHwKLOySW1+GzAmnkiIfBe4Wj2ZSWXI4V5t3Ah+2nsYGpdpGAaP04lwRijcLQ5OoJ pCv1H0qOWC2BFmX+0MIHa/Qq6tLhIk460G0qxcGI3UX7k2SpsdcYfLTKPsFnuDG0hQ fs4BT44RPQ+R8Is/xRmf2QQVFX4q7HWkx1az/Y2w= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Corinna Vinschen To: cygwin-cvs@sourceware.org Subject: [newlib-cygwin/main] winsup/cygwin/fhandler/proc.cc: format_proc_cpuinfo() Linux 6.8 cpuinfo flags X-Act-Checkin: newlib-cygwin X-Git-Author: Brian Inglis X-Git-Refname: refs/heads/main X-Git-Oldrev: 89afbb8d8af2d4cbb71194bc24697795b5eb0ef6 X-Git-Newrev: bfe2790e7bc4400019a765bb9d0b7545a05ce447 Message-Id: <20240318223917.7FF9D3858C5F@sourceware.org> Date: Mon, 18 Mar 2024 22:39:17 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dnewlib-cygwin.git;h=3Dbfe2790e7bc= 4400019a765bb9d0b7545a05ce447 commit bfe2790e7bc4400019a765bb9d0b7545a05ce447 Author: Brian Inglis AuthorDate: Sat Mar 16 10:44:00 2024 -0600 Commit: Corinna Vinschen CommitDate: Mon Mar 18 16:33:56 2024 +0100 winsup/cygwin/fhandler/proc.cc: format_proc_cpuinfo() Linux 6.8 cpuinfo= flags =20 add Linux 6.8 cpuinfo flags: Intel 0x00000007:1 eax:17 fred Flexible Return and Event Deliv= ery; AMD 0x8000001f eax:4 sev_snp SEV secure nested paging; document unused and some unprinted bits that could look like omissions; fix typos and misalignments; =20 Signed-off-by: Brian Inglis Diff: --- winsup/cygwin/fhandler/proc.cc | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/winsup/cygwin/fhandler/proc.cc b/winsup/cygwin/fhandler/proc.cc index be107cb8eacc..cb754185b833 100644 --- a/winsup/cygwin/fhandler/proc.cc +++ b/winsup/cygwin/fhandler/proc.cc @@ -1233,6 +1233,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features2, 13, "cx16"); /* cmpxchg16b instruction */ ftcprint (features2, 14, "xtpr"); /* send task priority messages= */ ftcprint (features2, 15, "pdcm"); /* perf/debug capabilities MSR= */ +/* ftcprint (features2, 16, ""); */ /* unused */ ftcprint (features2, 17, "pcid"); /* process context identifiers= */ ftcprint (features2, 18, "dca"); /* direct cache access */ ftcprint (features2, 19, "sse4_1"); /* xmm 4_1 sse 4.1 */ @@ -1273,14 +1274,18 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 11, "xop"); /* sse 5 extended AVX */ ftcprint (features1, 12, "skinit"); /* skinit/stgi */ ftcprint (features1, 13, "wdt"); /* watchdog timer */ +/* ftcprint (features1, 14, ""); */ /* unused */ ftcprint (features1, 15, "lwp"); /* light weight prof */ ftcprint (features1, 16, "fma4"); /* 4 operand MAC */ ftcprint (features1, 17, "tce"); /* translat cache ext */ +/* ftcprint (features1, 18, ""); */ /* unused */ ftcprint (features1, 19, "nodeid_msr"); /* nodeid MSR */ +/* ftcprint (features1, 20, ""); */ /* unused */ ftcprint (features1, 21, "tbm"); /* trailing bit manip */ ftcprint (features1, 22, "topoext"); /* topology ext */ ftcprint (features1, 23, "perfctr_core"); /* core perf ctr ext */ ftcprint (features1, 24, "perfctr_nb"); /* NB perf ctr ext */ +/* ftcprint (features1, 25, ""); */ /* unused */ ftcprint (features1, 26, "bpext"); /* data brkpt ext */ ftcprint (features1, 27, "ptsc"); /* perf timestamp ctr */ ftcprint (features1, 28, "perfctr_llc"); /* ll cache perf ctr */ @@ -1447,6 +1452,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 19, "adx"); /* adcx/adox */ ftcprint (features1, 20, "smap"); /* sec mode access prev */ ftcprint (features1, 21, "avx512ifma"); /* vec int FMA */ +/* ftcprint (features1, 22, ""); */ /* unused */ ftcprint (features1, 23, "clflushopt"); /* cache line flush opt */ ftcprint (features1, 24, "clwb"); /* cache line write back */ ftcprint (features1, 25, "intel_pt"); /* intel processor trace */ @@ -1468,6 +1474,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 1, "xsavec"); /* xsavec instruction */ ftcprint (features1, 2, "xgetbv1"); /* xgetbv ecx 1 */ ftcprint (features1, 3, "xsaves"); /* xsaves/xrstors */ +/* ftcprint (features1, 4, "xfd"); */ /* eXtended Feature Disabling */ } /* cpuid 0x0000000f edx */ if (maxf >=3D 0x0000000f) @@ -1502,9 +1509,18 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 4, "avx_vnni"); /* vex enc NN vec */ ftcprint (features1, 5, "avx512_bf16"); /* vec bfloat16 short */ /* ftcprint (features1, 7, "cmpccxadd"); */ /* CMPccXADD instructions */ -/* ftcprint (features1, 18, "lkgs"); */ /* load kernel (userspace) GS */ -/* ftcprint (features1, 21, "amx_fp16"); */ /* AMX fp16 Support */ -/* ftcprint (features1, 23, "avx_ifma"); */ /* Support for VPMADD52[H,L= ]UQ */ +/* ftcprint (features1, 8, "arch_perf"); */ /* Arch PerfMon Extension */ +/* ftcprint (features1, 10, "fzrm"); */ /* Fast zero-length REP MOVSB */ +/* ftcprint (features1, 11, "fsrs"); */ /* Fast short REP STOSB */ +/* ftcprint (features1, 12, "fsrc"); */ /* Fast short REP {CMPSB,SCASB}= */ + ftcprint (features1, 17, "fred"); /* Flexible Return and Event Deli= very */ +/* ftcprint (features1, 18, "lkgs"); */ /* load kernel (userspace) GS */ +/* ftcprint (features1, 19, "wrmsrns"); */ /* Non-serializing WRMSR */ +/* ftcprint (features1, 21, "amx_fp16"); */ /* AMX fp16 Support */ +/* ftcprint (features1, 22, "amx_bf16"); */ /* AMX bf16 Support */ +/* ftcprint (features1, 23, "avx_ifma"); */ /* Support for VPMADD52[H,L= ]UQ */ +/* ftcprint (features1, 24, "amx_tile"); */ /* AMX tile Support */ +/* ftcprint (features1, 25, "amx_int8"); */ /* AMX int8 Support */ ftcprint (features1, 26, "lam"); /* Linear Address Masking */ } =20 @@ -1531,6 +1547,7 @@ format_proc_cpuinfo (void *, char *&destbuf) /* ftcprint (features1, 26, "ssb_no"); */ /* ssb fixed in hardware */ ftcprint (features1, 27, "cppc"); /* collab proc perf ctl */ /* ftcprint (features1, 28, "amd_psfd"); */ /* predictive store fwd dis= */ +/* ftcprint (features1, 29, "btc_no"); */ /* Not vulnerable to Branch= Type Confusion */ ftcprint (features1, 31, "brs"); /* branch sampling */ } =20 @@ -1564,7 +1581,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 4, "tsc_scale"); /* TSC rate control */ ftcprint (features1, 5, "vmcb_clean"); /* VMCB clean bits */ ftcprint (features1, 6, "flushbyasid"); /* flush by ASID */ - ftcprint (features1, 7, "decode_assists"); /* decode assists */ + ftcprint (features1, 7, "decodeassists"); /* decode assists */ ftcprint (features1, 10, "pausefilter"); /* filt pause intrcpt */ ftcprint (features1, 12, "pfthreshold"); /* pause filt thresh */ ftcprint (features1, 13, "avic"); /* virt int control */ @@ -1580,6 +1597,7 @@ format_proc_cpuinfo (void *, char *&destbuf) { cpuid (&unused, &unused, &features1, &unused, 0x00000007, 0); =20 +/* ftcprint (features1, 0, ""); */ /* unused */ ftcprint (features1, 1, "avx512vbmi"); /* vec bit manip */ ftcprint (features1, 2, "umip"); /* user mode ins prot */ ftcprint (features1, 3, "pku"); /* prot key userspace */ @@ -1594,10 +1612,14 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 12, "avx512_bitalg"); /* vpopcnt/b/w vpshuf */ ftcprint (features1, 13, "tme"); /* total mem encrypt */ ftcprint (features1, 14, "avx512_vpopcntdq"); /* vec popcnt dw/qw */ +/* ftcprint (features1, 15, ""); */ /* unused */ ftcprint (features1, 16, "la57"); /* 5 level paging */ +/* ftcprint (features1, .., ""); */ /* unused */ ftcprint (features1, 22, "rdpid"); /* rdpid instruction */ +/* ftcprint (features1, 23, ""); */ /* unused */ ftcprint (features1, 24, "bus_lock_detect"); /* bus lock detect dbg exc= ptn */ ftcprint (features1, 25, "cldemote"); /* cldemote instr */ +/* ftcprint (features1, 26, ""); */ /* unused */ ftcprint (features1, 27, "movdiri"); /* movdiri instr */ ftcprint (features1, 28, "movdir64b"); /* movdir64b instr */ ftcprint (features1, 29, "enqcmd"); /* enqcmd/s instructions*/ @@ -1610,8 +1632,9 @@ format_proc_cpuinfo (void *, char *&destbuf) cpuid (&unused, &features1, &unused, &unused, 0x80000007, 0); =20 ftcprint (features1, 0, "overflow_recov"); /* MCA oflow recover= y */ - ftcprint (features1, 1, "succor"); /* uncor err recov= ery */ - ftcprint (features1, 3, "smca"); /* scalable MCA */ + ftcprint (features1, 1, "succor"); /* uncor err recovery */ +/* ftcprint (features1, 2, ""); */ /* unused */ + ftcprint (features1, 3, "smca"); /* scalable MCA */ } =20 /* Intel cpuid 0x00000007 edx */ @@ -1646,8 +1669,9 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features2, 1, "sev"); /* AMD secure encrypted virt */ /* ftcprint (features2, 2, "vm_page_flush");*/ /* VM page flush MSR */ ftcprint (features2, 3, "sev_es"); /* AMD SEV encrypted state */ -/* ftcprint (features2, 4, "sev_snp");*//* AMD SEV secure nested paging= */ + ftcprint (features2, 4, "sev_snp"); /* AMD SEV secure nested paging */ /* ftcprint (features2, 5, "vmpl"); *//* VM permission levels support= */ +/* ftcprint (features2, 9, "v_tsc_aux"); */ /* Virtual TSC_AUX */ /* ftcprint (features2, 10, "sme_coherent"); *//* SME h/w cache cohere= nt */ /* ftcprint (features2, 11, "sev_64b");*//* SEV 64 bit host guest only */ /* ftcprint (features2, 12, "sev_rest_inj"); *//* SEV restricted injec= tion */