From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 46062 invoked by alias); 9 Mar 2019 17:31:12 -0000 Mailing-List: contact cygwin-help@cygwin.com; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cygwin-owner@cygwin.com Mail-Followup-To: cygwin@cygwin.com Received: (qmail 46048 invoked by uid 89); 9 Mar 2019 17:31:12 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=1.4 required=5.0 tests=AWL,BAYES_20,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS,URIBL_GREY autolearn=no version=3.3.1 spammy=books, workshop, Road, road X-HELO: smtp-coi-wf-confirmed-01-216.aweber.com Received: from smtp-coi-wf-confirmed-01-216.aweber.com (HELO smtp-coi-wf-confirmed-01-216.aweber.com) (204.194.223.216) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 09 Mar 2019 17:31:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aweber.com; s=20180823-2048-2e9cf629; t=1552152669; bh=XUWG6O3H/nw9ZYKxD4Aenk2gv7M5SpBB0kpdv7VgmQ0=; h=Date:MIME-Version:Content-Type:From:To:List-Unsubscribe:Subject: Sender; b=PRYMr+FN7yF1xCB00j/fDGc607IZq9SoxxVX/l6oqtIezPMDdXZx6P+1Eb4k/yUiH 7NmjoPuixwyvZ7m+O1EdxlA77ic24gQizyEf5fORTWRE2h74B0HvEV4BjNNysq4NYH jBqhIyMjL6hqegSQ9tdHIS6N7lQvWeMEpC2ugIAKXjDuLfbnPGP6ZHwdofxkZDLPLa ogPZdlWjg20XyYo8YNZDJDgR668czDymKzL9Y/0FnxlABa6vGE5Xu2/QcvzghJbyzi E/K9oZOpn2sSg2nuXyePJ20obxi+ml+anzIZzcsfX5Q6ykH/9/+kbGOG1o09O56Thn Xl0mb7823IdcQ== Date: Sat, 09 Mar 2019 17:31:00 -0000 Message-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Kunal Ghosh" To: cygwin@cygwin.com Require-Recipient-Valid-Since: cygwin@cygwin.com; Sat, 09 Mar 2019 17:30:41 +0000 Subject: Welcome to my community at VLSI SYSTEM DESIGN!! Sender: Kunal Ghosh X-SW-Source: 2019-03/txt/msg00204.txt.bz2 Hey There, In case if you plan to visit or any future RISC-V workshop, you should be a= ware the basics of RISC-V and so here are the downloadable links for all sh= ort books on RISC-V which we have published till date. The last book is a s= trategy on VLSI Physical design implementation of 2 designs using opensourc= e EDA RTL2GDS flow 'qflow'. Download, read and enjoy.... RISC-V Introduction: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3Dc8n8ydIW_= 9FTy4FMjrNx.Q RISC-V Double-word: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3D30IZwptqm= 5KgOhf6ONkNCw Why RISC-V architecture has 32 registers: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3DeGpVUdzFS= fh1_E2ldNdV3w ABI =E2=80=93 Get this one right =E2=80=93 RISC-V: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3DjWifwo3Pv= ZzAvcZEqcvNfQ=E2=80=93-Get-this-one-right-=E2=80=93-RISC-V.pdf Wanna quick solution to identify overflows? =E2=80=93 Use RISC-V branches https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3Dhm2GZfhsz= yjZL24wvUZE4A =46rom VLSI to System Design (SoC) =E2=80=93 The choice of SPI: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3D4Zok96Wgl= Pb8eG.7FudBEg Book on Physical design using opensource EDA qflow, along with LIVE example= s: https://clicks.aweber.com/y/ct/?l=3DNOBMW&m=3D3yR80EZOX3A8._6&b=3DZ5yY3fhaO= VXP_SXZXLE7dQ Outer Ring Road Bangalore Bangalore Karnataka 560037 INDIA To unsubscribe or change subscriber options, visit: https://www.aweber.com/z/r/?zByMDCxMLLTsTCwsnOwMjLRmtEzMHCwsHJys -- Problem reports: http://cygwin.com/problems.html FAQ: http://cygwin.com/faq/ Documentation: http://cygwin.com/docs.html Unsubscribe info: http://cygwin.com/ml/#unsubscribe-simple