From: "marxin.liska at gmail dot com" <sourceware-bugzilla@sourceware.org>
To: dwz@sourceware.org
Subject: [Bug default/24965] [dwz] Faster hashing using native insns
Date: Tue, 01 Jan 2019 00:00:00 -0000 [thread overview]
Message-ID: <bug-24965-11298-gcFCgYoMcS@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-24965-11298@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=24965
Martin Liška <marxin.liska at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |marxin.liska at gmail dot com
--- Comment #2 from Martin Liška <marxin.liska at gmail dot com> ---
I do welcome the attempt to adapt the crc32 instructions. If I see correctly,
the instructions are available on x86_64 since SSE 4.2. Which should be
available for the vast majority of CPUs.
Note that one can use directly i386 builtins like:
static inline uint64_t _mm_crc32_u64(uint64_t crc, uint64_t value) {
return __builtin_ia32_crc32qi (crc, value);
}
plus you'll need to use -msse42, or -mcrc32. So I would recommend to use a
start detection of the ISA and then use the instruction.
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next prev parent reply other threads:[~2019-09-05 7:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-01 0:00 [Bug default/24965] New: " vries at gcc dot gnu.org
2019-01-01 0:00 ` [Bug default/24965] " vries at gcc dot gnu.org
2019-01-01 0:00 ` jakub at redhat dot com
2019-01-01 0:00 ` jakub at redhat dot com
2019-01-01 0:00 ` marxin.liska at gmail dot com
2019-01-01 0:00 ` jakub at redhat dot com
2019-01-01 0:00 ` marxin.liska at gmail dot com
2019-01-01 0:00 ` vries at gcc dot gnu.org
2019-01-01 0:00 ` marxin.liska at gmail dot com [this message]
2019-01-01 0:00 ` vries at gcc dot gnu.org
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