From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5009 invoked by alias); 7 Jan 2011 13:39:20 -0000 Received: (qmail 4990 invoked by uid 22791); 7 Jan 2011 13:39:18 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 07 Jan 2011 13:39:14 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id 2C1E23770005 for ; Fri, 7 Jan 2011 13:39:12 +0000 (GMT) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DbpQHjdQJEJJ; Fri, 7 Jan 2011 13:39:11 +0000 (GMT) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-bugs@ecos.sourceware.org Subject: [Bug 1001111] Access to saved registers from Cortex-M ISR X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: HAL X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: nickg@ecoscentric.com X-Bugzilla-Status: NEW X-Bugzilla-Priority: normal X-Bugzilla-Assigned-To: unassigned@bugs.ecos.sourceware.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: CC In-Reply-To: References: X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Fri, 07 Jan 2011 13:39:00 -0000 Message-Id: <20110107133909.7E36C2F78009@mail.ecoscentric.com> Mailing-List: contact ecos-bugs-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-bugs-owner@sourceware.org X-SW-Source: 2011/txt/msg00014.txt.bz2 Please do not reply to this email. Use the web interface provided at: http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001111 Nick Garnett changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |nickg@ecoscentric.com --- Comment #1 from Nick Garnett 2011-01-07 13:39:06 GMT --- The intention with the code as it was written is that if anything needs access to the interrupt state then it should enable the existing code that saves a full and complete CPU state and stores it in hal_saved_interrupt_state; either by defining the CTRLC support option or by new means. Interested code can then fetch it from there. That way this code is only included when this functionality is required. The extra ISR argument is also a bad idea, it has caused problems in other architectures and my intention was to keep the Cortex-M architecture clean and not have it. There is maybe a case for defining a CDL option that controls this piece of code and have that depend on CTRLC and BREAK support, as well as allowing it to be enabled by any other package. -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.