[Bug 1001158] New: SPI Test broken

[Bug 1001158] New: SPI Test broken

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           Summary: SPI Test broken
           Product: eCos
           Version: CVS
          Platform: stm32e_eval (ST STM3210E EVAL board)
        OS/Version: Cortex-M
            Status: UNCONFIRMED
          Severity: minor
          Priority: low
         Component: Test farm
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: aschwarz@unifire.ch
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


Hi 

I just downloaded the latest source code and ran all the tests

$ ecosconfig new stm3210e_eval default
$ ecosconfig tree
$ make tests

I got the following error message:

../ecos/stm32/ecos-hg/packages/devs/spi/cortexm/stm32/current/tests/loopback.c:93:
Fehler: »cyg_spi_stm32_bus1« ist hier nicht deklariert (nicht in einer
Funktion)
make[1]: *** [tests/loopback.d] Fehler 1

The linker can not find cyg_spi_stm32_bus1

-
Andreas

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Subject: [Bug 1001158] New: SPI Test broken
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           Summary: SPI Test broken
           Product: eCos
           Version: CVS
          Platform: stm32e_eval (ST STM3210E EVAL board)
        OS/Version: Cortex-M
            Status: UNCONFIRMED
          Severity: minor
          Priority: low
         Component: Test farm
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: aschwarz@unifire.ch
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


Hi 

I just downloaded the latest source code and ran all the tests

$ ecosconfig new stm3210e_eval default
$ ecosconfig tree
$ make tests

I got the following error message:

../ecos/stm32/ecos-hg/packages/devs/spi/cortexm/stm32/current/tests/loopback.c:93:
Fehler: »cyg_spi_stm32_bus1« ist hier nicht deklariert (nicht in einer
Funktion)
make[1]: *** [tests/loopback.d] Fehler 1

The linker can not find cyg_spi_stm32_bus1

-
Andreas

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Subject: [Bug 1001158] SPI Test broken
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John Dallaway <john@dallaway.org.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
                 CC|                            |chris@zynaptic.com,
                   |                            |john@dallaway.org.uk
          Component|Test farm                   |SPI
     Ever Confirmed|0                           |1

--- Comment #1 from John Dallaway <john@dallaway.org.uk> 2011-02-18 11:15:48 GMT ---
Andreas, thank you for the bug report.

Bug confirmed. The STM32 SPI loopback test assumes SPI bus 1 is enabled.

A quick workaround is to add the following line to the definition of
CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS in spi_stm32.cdl:

  active_if       CYGHWR_DEVS_SPI_CORTEXM_STM32_BUS1

A better long term fix would be to add CDL to specify the SPI bus to used for
testing and disable the test if this bus is not specified explicitly.

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[Bug 1001158] SPI Test broken

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--- Comment #2 from Chris Holgate <chris@zynaptic.com> 2011-02-19 12:43:55 GMT ---
The loopback test should not be included in the set of default eCos tests
because it relies on a hardware modification in order to work.  Specifically,
MISO and MOSI need to be shorted together and any other devices on the bus need
to be explicitly disabled.  The comments at the top of the test file should
explain this in more detail.

I included it in the original package because although it can't be used for
standard regression tests it is a useful test harness for anyone who has to
maintain the driver.

The fix is to remove the CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS option completely.

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[Bug 1001158] SPI Test broken

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--- Comment #3 from John Dallaway <john@dallaway.org.uk> 2011-02-19 14:07:24 GMT ---
(In reply to comment #2)

> The fix is to remove the CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS option completely.

It would be a shame to disable the building of the test completely. The
building of an eCos test which requires some sort of external harness is
typically enabled via a CDL option and disabled by default (eg
CYGBLD_IO_SERIAL_EXTRA_TESTS).

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[Bug 1001158] SPI Test broken

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John Dallaway <john@dallaway.org.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
         AssignedTo|unassigned@bugs.ecos.source |john@dallaway.org.uk
                   |ware.org                    |

--- Comment #4 from John Dallaway <john@dallaway.org.uk> 2011-03-10 12:07:29 GMT ---
Created an attachment (id=1168)
 --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1168)
stm32-spi-build-110310.patch

This patch adds a CDL option to control building of the STM32 SPI loopback
test. Building of this test is disabled by default to avoid the reported build
failure in the default configuration.

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[Bug 1001158] SPI Test broken

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John Dallaway <john@dallaway.org.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |CURRENTRELEASE

--- Comment #5 from John Dallaway <john@dallaway.org.uk> 2011-03-11 14:48:12 GMT ---
Patch checked-in.

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[Bug 1001158] SPI Test broken

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John Dallaway <john@dallaway.org.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
         AssignedTo|unassigned@bugs.ecos.source |john@dallaway.org.uk
                   |ware.org                    |

--- Comment #4 from John Dallaway <john@dallaway.org.uk> 2011-03-10 12:07:29 GMT ---
Created an attachment (id=1168)
 --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1168)
stm32-spi-build-110310.patch

This patch adds a CDL option to control building of the STM32 SPI loopback
test. Building of this test is disabled by default to avoid the reported build
failure in the default configuration.

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[Bug 1001158] SPI Test broken

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--- Comment #3 from John Dallaway <john@dallaway.org.uk> 2011-02-19 14:07:24 GMT ---
(In reply to comment #2)

> The fix is to remove the CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS option completely.

It would be a shame to disable the building of the test completely. The
building of an eCos test which requires some sort of external harness is
typically enabled via a CDL option and disabled by default (eg
CYGBLD_IO_SERIAL_EXTRA_TESTS).

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[Bug 1001158] SPI Test broken

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--- Comment #2 from Chris Holgate <chris@zynaptic.com> 2011-02-19 12:43:55 GMT ---
The loopback test should not be included in the set of default eCos tests
because it relies on a hardware modification in order to work.  Specifically,
MISO and MOSI need to be shorted together and any other devices on the bus need
to be explicitly disabled.  The comments at the top of the test file should
explain this in more detail.

I included it in the original package because although it can't be used for
standard regression tests it is a useful test harness for anyone who has to
maintain the driver.

The fix is to remove the CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS option completely.

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[Bug 1001158] SPI Test broken

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John Dallaway <john@dallaway.org.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
                 CC|                            |chris@zynaptic.com,
                   |                            |john@dallaway.org.uk
          Component|Test farm                   |SPI
     Ever Confirmed|0                           |1

--- Comment #1 from John Dallaway <john@dallaway.org.uk> 2011-02-18 11:15:48 GMT ---
Andreas, thank you for the bug report.

Bug confirmed. The STM32 SPI loopback test assumes SPI bus 1 is enabled.

A quick workaround is to add the following line to the definition of
CYGPKG_DEVS_SPI_CORTEXM_STM32_TESTS in spi_stm32.cdl:

  active_if       CYGHWR_DEVS_SPI_CORTEXM_STM32_BUS1

A better long term fix would be to add CDL to specify the SPI bus to used for
testing and disable the test if this bus is not specified explicitly.

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