[Bug 1001111] New: Access to saved registers from Cortex-M ISR

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           Summary: Access to saved registers from Cortex-M ISR
           Product: eCos
           Version: CVS
          Platform: All
        OS/Version: Cortex-M
            Status: NEW
          Severity: enhancement
          Priority: normal
         Component: HAL
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: john@dallaway.org.uk
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


Created an attachment (id=1072)
 --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1072)
cortexm-intr-state-110107.patch

There is currently no access to the saved interrupt state from an ISR on
Cortex-M. This is required for implementing profiling support and is commonly
provided by passing a HAL_SavedRegisters* parameter into the ISR (eg ARM,
PowerPC).

On Cortex-M, interrupts are delivered via the C function
hal_deliver_interrupt() which is called from the default interrupt VSR. The
attached patch modifies the VSR to pass the interrupt state to
hal_deliver_interrupt() unconditionally. hal_deliver_interrupt() then passes
this parameter on to the ISR.

API impact is confined to code which calls hal_deliver_interrupt() directly -
currently a single instance in an STM32 springboard ISR only.

The patch adds two machine code instructions to an unoptimised build of
hal_deliver_interrupt(). The patch adds three machine code instructions to the
default interrupt VSR in the case where GDB break support is not enabled. These
three instructions could be made conditional on CYGPKG_PROFILE_GPROF, but
access to the saved interrupt state is unconditional on other architectures.

Comments?

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