[Bug 1001437] New: ADC HW drivers have race condition in cyg_io_set_config(CYG_IO_SET_CONFIG_ADC_[EN|DIS]ABLE)

[Bug 1001437] New: ADC HW drivers have race condition in cyg_io_set_config(CYG_IO_SET_CONFIG_ADC_[EN|DIS]ABLE)

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           Summary: ADC HW drivers have race condition in
                    cyg_io_set_config(CYG_IO_SET_CONFIG_ADC_[EN|DIS]ABLE)
           Product: eCos
           Version: CVS
          Platform: All
        OS/Version: All
            Status: UNCONFIRMED
          Severity: major
          Priority: low
         Component: ADC
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: bernard.fouche@kuantic.com
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


Hello.

While looking at the source code of the LPC2XXX ADC driver, and after having
checked other ADC hardware drivers, it seems that all of these drivers, when
processing CYG_IO_SET_CONFIG_ADC_ENABLE and CYG_IO_SET_CONFIG_ADC_DISABLE, do
the following processing:

xxx_adc_disable(cyg_adc_channel *chan)
{
  xxx_adc_info *info=chan->device->dev_priv;

  ...

  info->chan_mask &= [some code to get bit value for concerned channel];
  ...
}

The opposite, for xxx_adc_enable(), is done with "info->chan_mask |= ..."

In multi-thread, if more than one thread handle ADC channels, since
info->chan_mask points, for all channels, to the same data area, then a thread
may be interrupted in the middle of the read-modify-write operation to update
the bit/channel field. Another thread can be scheduled and do its own
read-modify-write op on the same area.

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[Bug 1001437] New: ADC HW drivers have race condition in cyg_io_set_config(CYG_IO_SET_CONFIG_ADC_[EN|DIS]ABLE)

[bugzilla-daemon]

Please do not reply to this email. Use the web interface provided at:
http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001437

           Summary: ADC HW drivers have race condition in
                    cyg_io_set_config(CYG_IO_SET_CONFIG_ADC_[EN|DIS]ABLE)
           Product: eCos
           Version: CVS
          Platform: All
        OS/Version: All
            Status: UNCONFIRMED
          Severity: major
          Priority: low
         Component: ADC
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: bernard.fouche@kuantic.com
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


Hello.

While looking at the source code of the LPC2XXX ADC driver, and after having
checked other ADC hardware drivers, it seems that all of these drivers, when
processing CYG_IO_SET_CONFIG_ADC_ENABLE and CYG_IO_SET_CONFIG_ADC_DISABLE, do
the following processing:

xxx_adc_disable(cyg_adc_channel *chan)
{
  xxx_adc_info *info=chan->device->dev_priv;

  ...

  info->chan_mask &= [some code to get bit value for concerned channel];
  ...
}

The opposite, for xxx_adc_enable(), is done with "info->chan_mask |= ..."

In multi-thread, if more than one thread handle ADC channels, since
info->chan_mask points, for all channels, to the same data area, then a thread
may be interrupted in the middle of the read-modify-write operation to update
the bit/channel field. Another thread can be scheduled and do its own
read-modify-write op on the same area.

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