From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29725 invoked by alias); 10 Oct 2012 09:37:55 -0000 Received: (qmail 29657 invoked by uid 22791); 10 Oct 2012 09:37:54 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 10 Oct 2012 09:37:43 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id D89432F78026 for ; Wed, 10 Oct 2012 10:37:42 +0100 (BST) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VmRE0npGTo8l; Wed, 10 Oct 2012 10:37:40 +0100 (BST) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-bugs@ecos.sourceware.org Subject: [Bug 1001683] New: Cortex-M3: Startup Code does not initialize last of available interrupts vectors X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: HAL X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: martin.hopfeld@sse-erfurt.de X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: unassigned@bugs.ecos.sourceware.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Wed, 10 Oct 2012 09:37:00 -0000 Mailing-List: contact ecos-bugs-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-bugs-owner@sourceware.org X-SW-Source: 2012/txt/msg01290.txt.bz2 Please do not reply to this email. Use the web interface provided at: http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001683 Summary: Cortex-M3: Startup Code does not initialize last of available interrupts vectors Product: eCos Version: CVS Platform: Other (please specify) OS/Version: Cortex-M Status: UNCONFIRMED Severity: normal Priority: low Component: HAL AssignedTo: unassigned@bugs.ecos.sourceware.org ReportedBy: martin.hopfeld@sse-erfurt.de CC: ecos-bugs@ecos.sourceware.org Class: Advice Request Created an attachment (id=1954) --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1954) Fix Cortex-M interrupt vector initialization Using an STM32F103 I ran into a HardFault exception when using DMA2_CH5 with interrupts enabled. It seems no interrupt handler is registered by the startup code for this particular interrupt source. The DMA2_CH5 interrupt is the last entry in the interrupt list according to STM32F103 reference manual. Please see attached patch to the startup code on Cortex-M architecture to use the correct constant (CYGNUM_HAL_VSR_COUNT) when iterating over all interrupts and installing hal_default_interrupt_vsr(). This patch works for me and allows DMA2_CH5 to signal transfer complete by interrupt. -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.