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From: bugzilla-daemon@bugs.ecos.sourceware.org
To: ecos-bugs@ecos.sourceware.org
Subject: [Bug 1001796] AT91/ARM9 architecure extension
Date: Mon, 11 Mar 2013 13:58:00 -0000
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--- Comment #2 from Bernd Edlinger <bernd.edlinger@hotmail.de> ---
Created attachment 2126
  --> http://bugs.ecos.sourceware.org/attachment.cgi?id=2126&action=edit
fix for kernel/current/tests/kcache2.c

This fixes some collateral damage in kcache2.c:

Some very small targets failed to compile this test sample.
Although the targets do not have any cache, kcache2.c may overflow
the .bss segment with a 64K test variable.

Reason: in preparation to enabling the DATA Cache, the macro
HAL_DCACHE_LINE_SIZE is now always defined to a power of 2.

This is suitable to place cache aligned variables with
__attribute__((aligned(HAL_DCACHE_LINE_SIZE)))

If the hardware does not support DCACHE however, HAL_DCACHE_LINE_SIZE is 4,
thus the variable is simply word-aligned.

Unfortunately the kcache2.c has a conditional code like
#ifdef HAL_DCACHE_LINE_SIZE
but it should better use #ifdef HAL_DCACHE_SIZE for this purpose.

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