From: "rauch" <rrauch@itrgmbh.de>
To: <ecos-devel@ecos.sourceware.org>
Subject: Announcement eCos 3.0 Port to Xilinx Zynq 7000-EPP (Z-7020)
Date: Wed, 15 Aug 2012 15:20:00 -0000 [thread overview]
Message-ID: <01b001cd7af9$649d53d0$2dd7fb70$@itrgmbh.de> (raw)
Dear community,
I want to announce an eCos 3.0 porting project to Xilinx Zynq 7000
EXTENSIBLE PROCESSING PLATFORM
http://www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm.
This port will be done in direct collaboration with Xilinx.
Planned main features of port:
- Architecture Port of Cortex A9 CPU in Zynq-7000
- AMP dual core architecture support
- Memory Configuration DDR
- Interrupt Controller
- Timer and Watchdog Configuration
- UART
- Cache Configuration
- QSPI support
- Tri-Mode Ethernet MAC
- General Purpose Port (AXI_GP) driver
- Configuration and Download and access of programmable logic
- DMA support within drivers
- SD card support
- GPIO driver
- I2C
- Support of Performance Monitoring Unit of Cortex A9 CPU
- XADC driver
- CAN driver
- Redboot
The port will be prepared for Zynq-7000 ZC702 Evaluation Kit.
I would be very glad to get some response, whether the planned port is of
common interest!
Best Regards
Richard Rauch
ITR GmbH Nuremberg, Germany
web: http://www.itrgmbh.de
email: info@itrgmbh.de
reply other threads:[~2012-08-15 15:20 UTC|newest]
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