From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29198 invoked by alias); 27 Nov 2008 14:58:20 -0000 Received: (qmail 29189 invoked by uid 22791); 27 Nov 2008 14:58:20 -0000 X-Spam-Level: * X-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS X-Spam-Check-By: sourceware.org Received: from vicky.2020media.com (HELO smtp.2020smtp.net) (212.124.192.213) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 27 Nov 2008 14:57:31 +0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=wibb3e; d=2020media.com; h=Received:Subject:From:To:Content-Type:Organization:Date:Message-Id:Mime-Version:X-Mailer:Content-Transfer-Encoding:X-2020-Relay; b=g6zq9+IziS77wqH9Vm67YNxQwMp0+rznnDsES/DKn6yL+DgQVRRqUQ86itPJpZi3EBW6p02MOSoRI92XaV0yYloJdxO25jhjhC9TcwxWUUZnS3QBXuM3RUkioYOnzUNV; Received: from [212.124.199.38] (helo=[192.168.0.2]) by smtp.2020smtp.net with esmtp (Exim 4.63) (envelope-from ) id 1L5iIo-00059w-Qd for ecos-devel@ecos.sourceware.org; Thu, 27 Nov 2008 14:57:10 +0000 Subject: Setting up new linker section for DMA bounce buffers (STM32). From: Chris Holgate To: "ecos-devel@ecos.sourceware.org" Content-Type: text/plain Organization: Zynaptic Limited Date: Thu, 27 Nov 2008 14:58:00 -0000 Message-Id: <1227797847.2834.37.camel@hercules.zynaptic.com> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1.1 Content-Transfer-Encoding: 7bit X-2020-Relay: Sent using 2020MEDIA.net.uk relay with auth code: Send Abuse reports to abuse@2020media.net.uk X-IsSubscribed: yes Mailing-List: contact ecos-devel-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-devel-owner@ecos.sourceware.org X-SW-Source: 2008-11/txt/msg00072.txt.bz2 Hi folks, I'm in the process of tidying up my STM32 SPI driver code for more general release. While it all works fine for on-chip memory (my particular use case), the DMA does not support access to external memory (generic STM3210E-EVAL). This means that I'll need to add optional support for DMA bounce buffering via the on-chip SRAM. I'm sure that this is a problem which must have been addressed on other platforms. Is there a convention for setting up such a DMA-specific section in the memory layout files - and are there any existing examples you can point me to? Chris.