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* PPC40x port
@ 2006-05-19  4:43 Manfred Wölfel
  0 siblings, 0 replies; only message in thread
From: Manfred Wölfel @ 2006-05-19  4:43 UTC (permalink / raw)
  To: ecos-devel

Hi,

I have a board with a PPC405 where the RAM does not start at 0 while 
variant.inc assumes it starts at 0. For this reason I have written the 
attached patch.

Manfred

------------------------------------------------------------------------

--- hal/powerpc/ppc40x/current/include/variant.inc     2006-05-19 
06:33:04.000000000 +0200
+++ /tmp/6275-1-1-merge.txt     2006-05-19 06:32:08.000000000 +0200
@@ -150,7 +150,7 @@
         # or we are starting in RAM and NOT using a ROM monitor,
         # copy exception handler code to 0.
         lwi     r3,rom_vectors          # r3 = rom start
-        lwi     r4,0                    # r4 = ram start
+        lwi     r4,CYGHWR_HAL_POWERPC_VECTOR_BASE # r4 = ram start
         lwi     r5,rom_vectors_end      # r5 = rom end
         cmplw   r3,r5                   # skip if no vectors
         beq     2f
@@ -166,8 +166,8 @@
 2:
 #endif

-        # Ensure that the vectors will come from 0x0000
-        lwi     r4,0
+        # Ensure that the vectors will come from 
CYGHWR_HAL_POWERPC_VECTOR_BASE
+        lwi     r4, CYGHWR_HAL_POWERPC_VECTOR_BASE
         mtspr   SPR_EVPR,r4

         # Next initialize the VSR table. This happens whether the
@@ -199,8 +199,8 @@

         .macro  hal_mon_init

-        # Ensure that the vectors will come from 0x0000
-        lwi     r4,0
+        # Ensure that the vectors will come from 
CYGHWR_HAL_POWERPC_VECTOR_BASE
+        lwi     r4,CYGHWR_HAL_POWERPC_VECTOR_BASE
         mtspr   SPR_EVPR,r4

         lwi     r3,cyg_hal_default_interrupt_vsr

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