From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21466 invoked by alias); 21 Nov 2008 15:41:19 -0000 Received: (qmail 21398 invoked by uid 22791); 21 Nov 2008 15:41:17 -0000 X-Spam-Status: No, hits=-1.0 required=5.0 tests=AWL,BAYES_05 X-Spam-Check-By: sourceware.org Received: from d5152C2DE.access.telenet.be (HELO lx-dmz.televic.com) (81.82.194.222) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 21 Nov 2008 15:40:41 +0000 Received: (qmail 26233 invoked from network); 21 Nov 2008 15:40:37 -0000 Received: from srv-vs06.televic.com (10.0.0.46) by lx-dmz.televic.com with (RC4-MD5 encrypted) SMTP; 21 Nov 2008 15:40:37 -0000 Received: from [127.0.0.1] (10.0.56.4) by SRV-VS06.TELEVIC.COM (10.0.0.46) with Microsoft SMTP Server id 8.1.291.1; Fri, 21 Nov 2008 16:41:49 +0100 Message-ID: <4926D675.4080702@televic.com> Date: Fri, 21 Nov 2008 15:41:00 -0000 From: =?ISO-8859-1?Q?J=FCrgen_Lambrecht?= Organization: Televic User-Agent: Thunderbird 2.0.0.17 (Windows/20080914) MIME-Version: 1.0 To: "ecos-devel@ecos.sourceware.org" Subject: hal/arm/at91/../var_io.h: HAL_ARM_AT91_GPIO_GET Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 8bit Mailing-List: contact ecos-devel-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-devel-owner@ecos.sourceware.org X-SW-Source: 2008-11/txt/msg00043.txt.bz2 Hello, The current implementation of HAL_ARM_AT91_GPIO_GET in hal/arm/at91/../var_io.h uses the AT91_PIO_PDSR register. But, "Reading the I/O line levels requires the clock of the PIO Controller to be enabled". So if you forget to enable the related PIO clock, this HAL_ARM_AT91_GPIO_GET always fails! Therefore, I propose to use the AT91_PIO_ODSR register. Anyhow, the added value of PDSR over ODSR is small I think: -with ODSR you read the value you want this pin to be -with PDSR you read the actual (physical) value of this pin They are only different if there is a hardware problem.. So, to remove the burden of enabling also the relevant PIO clock, and to save power, I propose to use ODSR. If you agree, I will add a patch. Kind regards, Jürgen