Re: IRQ-Enable in ARM-Target (cpsr)

[Gary Thomas <gary@mlbassoc.com>]

Martin Laabs wrote:
> Hi,
> 
> I'm currently searching the bug that prevents the STRG-C break of
> the GDB stub. (LPC2294) I discovered that the (global) IRQ-Disable 
> bit in  the cpsr register is set. Because of that the STRG-C interrupt
> of  the debug channel is unable to occure.
> I searched in the whole code but did not found the part where this
> IRQ-Disable bit (bit 7) is cleared.
> Maybe you have a hint for me? Where should I add the patch for that?
> In the cyg_hal_plf_serial_init() function? (The HAL_INTERRUPT_(U)MASK
> functions work only with the interrupt controller)
> Whats about the other packages that uses the interrupts? (I currently
> use the minimal config to search the bug.) Where and when do they disable
> the global interrupt-disable flag?

This normally happens when you start running threads (call
the scheduler).

What sort of program are you trying to run (and use interrupts)?

-- 
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Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
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