Hello Andrew and others,

Thank you Andrew for your reply.
I understand why I can't change CYGNUM_KERNEL_COUNTERS_RTC_PERIOD at my 
convenience.
May I ask my second question about cyg_thread_delay(1).
I understand that cyg_thread_delay(1) delays 10msec but my result shows 
apparently too short period.
I re-write my test and result.
-- my test
run_tests(CYG_ADDRESS id)
{
        |
    diag_printf("CYGNUM_KERNEL_COUNTERS_RTC_PERIOD=0x%x\n",CYGNUM_KERNEL_COUNTERS_RTC_PERIOD);
    HAL_CLOCK_READ(&thread_ft[0].start);
    diag_printf("start=%d\n",thread_ft[0].start);
    diag_printf("10msec Start !\n");
    cyg_thread_delay(1);     //10msec
    diag_printf("Finish !\n");
    HAL_CLOCK_READ(&thread_ft[0].end);
    diag_printf("end=%d\n",thread_ft[0].end);
-- result log
CYGNUM_KERNEL_COUNTERS_RTC_PERIOD=0x12000
start=7103
10msec Start !
Finish !
end=16512
delta=9409

As I said,
My target board is CPU SH7709S,Peripheral clock = 29491200Hz.
I setted CYGHWR_HAL_SH_TMU_PRESCALE_0 = 4 so TMU0's 1tick perid is..
29491200/4=7372800Hz,1/7372800=0.000000135sec=0.135microsec.
On the assumption that HAL_CLOCK_READ operating correctly,
according to result cyg_thread_delay(1) took only
9409 x 0.135 = 1270.215 microsec.
I cannot understand why it finish so short perid.
I re-post untitled.ecc.gz.
Please teach me why I get such result.
Masahiro Ariga