Re: [ECOS] How to access PCI memory(HELP)....

["Ling Su" <lingsu@palmmicro.com>]

> The fix may be just changing the definition of 
> HAL_PCI_PHYSICAL_MEMORY_BASE in plf_io.h to 0x0C000000
> 
> Give that a go and let us know if it worked.
> 

Hi, Jifl, 

following are the log after I apply your suggested change.

Regards,
-Ling

======================================================
(gdb) set remotebaud 38400
(gdb) target remote /dev/ttyS0
Remote debugging using /dev/ttyS0
0x80003a50 in ?? ()
(gdb) load
Loading section .rom_vectors, size 0xb4 lma 0x80100000
Loading section .text, size 0xd9b0 lma 0x801000b4
Loading section .ctors, size 0x28 lma 0x8010da64
Loading section .dtors, size 0x14 lma 0x8010da8c
Loading section .rodata, size 0x9cc lma 0x8010daa0
Loading section .data, size 0x473c lma 0x8010e470
Start address 0x801000a4 , load size 76712
Transfer rate: 26682 bits/sec, 501 bytes/write.
(gdb) cont
Continuing.
Found device on bus 0, devfn 0x10:
 Device configuration succeeded
 **** Device IO and MEM access enabled
 Vendor    0x1688
 Device    0x8888
 Command   0x0000, Status 0x0280
 Class/Rev 0x07800001
 Header 0x11FF0F
 SubVendor 0x1111, Sub ID 0xFF1A
 BAR[0]    0x00000000 / probed size 0xFFF00000 / CPU addr 0x0C000000
 BAR[1]    0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF
 BAR[2]    0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF
 BAR[3]    0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF
 BAR[4]    0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF
 BAR[5]    0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF
 Wired to HAL vector 13
Current pci base is 0C000000
[New thread 3]

Program received signal SIGSEGV, Segmentation fault.
[Switching to thread 3]
0x80100bb8 in pci_test () at pcitest.c:293
293     (*(pci_base + 0x004)) = 0x0000;
Current language:  auto; currently c