From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ling Su" To: "Nick Garnett" Cc: "Jonathan Larmour" , Subject: Re: [ECOS] How to access PCI memory(HELP).... Date: Tue, 12 Sep 2000 11:07:00 -0000 Message-id: <002801c01ce4$4a3f7d90$0201a8c0@raccoon> References: <00e101c01c6f$1c891f70$1201a8c0@crusoe> X-SW-Source: 2000-09/msg00170.html > > I responded to your previous message before I saw this one. As I said > there, I think that adjusting HAL_PHYSICAL_MEMORY_BASE so that the CPU > addr ends up at 0xD000_0000 will fix your problem. > > I guess HAL_PHYSICAL_MEMORY_BASE is probably misnamed, it should > really be HAL_PHYSICAL_MEMORY_OFFSET. It only works as a base when the > PCI memory allocation starts at zero. > Hi, Nick, Yeah, I think I can understand your suggestion, unfortuantely I still met segment fault. I append my log message in the end, please take a look, I don't exactly the memory mapping for eCos in vrc4373 board. I guess there is something wrong on the PCI space and memory space. Could you let me know how can I trace the SIGSEGV and the segment fault, so that I can figure out which part is wrong. I don't quiet understand why I can not access 0xD000_0000 at all. Thanks a lot! Best Rgds, -Ling ====================================================== (gdb) cont Continuing. Found device on bus 0, devfn 0x10: Device configuration succeeded **** Device IO and MEM access enabled Vendor 0x1688 Device 0x8888 Command 0x0000, Status 0x0280 Class/Rev 0x07800001 Header 0x11FF0F SubVendor 0x1111, Sub ID 0xFF1A BAR[0] 0x90000000 / probed size 0xFFF00000 / CPU addr 0xD0000000 BAR[1] 0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF BAR[2] 0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF BAR[3] 0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF BAR[4] 0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF BAR[5] 0x00000000 / probed size 0x00000000 / CPU addr 0xFFFFFFFF Wired to HAL vector 13 Current pci base is D0000000 [New thread 3] Program received signal SIGSEGV, Segmentation fault. [Switching to thread 3] 0x80100bb8 in pci_test () at pcitest.c:293 293 (*(pci_base + 0x004)) = 0x0000; Current language: auto; currently c (gdb)