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* [ECOS] Serial Driver (Interrupt Mode) for PXA250
@ 2006-08-21 13:39 Himanshu Patel
  0 siblings, 0 replies; 3+ messages in thread
From: Himanshu Patel @ 2006-08-21 13:39 UTC (permalink / raw)
  To: ecos-discuss

Hi,

I am working on PXA250 development board.  ISR (and hence DSR) is not
getting fired for FFUART (Serial Driver works well in Polling Mode).

Sending herewith code for Initialization and Configuration for reference:

#define PXA2X0_FFUART0     0x40100000
#define CYGNUM_HAL_INTERRUPT_USART0  (22)

static bool triton_serial_config_port(serial_channel *chan,
cyg_serial_info_t *new_config, bool init)
{
    triton_serial_info *triton_chan = (triton_serial_info *)chan->dev_priv;
    CYG_ADDRWORD base = triton_chan->base;
   cyg_uint32 baudrate;
 cyg_uint32 parity = select_parity((cyg_uint32) new_config->parity);
    cyg_uint32 word_length = select_word_length((cyg_uint32)
new_config->word_length);
    cyg_uint32 stop_bits = select_stop_bits((cyg_uint32) new_config->stop);
    if ((word_length == 0xFF) || (parity == 0xFF) || (stop_bits == 0xFF))
 {
        return false;  // Unsupported configuration
    }
 // Enable Divisor Latch Access Bit in Line Control Register.
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, PXA2X0_UART_LCR_DLAB);
 baudrate = select_baudrate((cyg_uint32) new_config->baud);
 // Divisor Latch Low Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_DLL, (baudrate & 0xFF));
 // Divisor Latch High Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_DLH, ((baudrate & 0xFF00) >> 8));
 // Disable Divisor Latch Access Bit in Line Control Register.
 // Reset the Line Control Register.
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, 0x00);
 // Configure Line Control Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, parity | word_length | stop_bits);
 // Disable UART interrupts.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, 0x00000000);
 // Enable UART Unit.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_UUE);
#if CYGNUM_IO_SERIAL_ARM_TRITON_SERIAL0_BUFSIZE > 0
 // Enable Transmit and Receive FIFO
 HAL_WRITE_UINT32(base + PXA2X0_UART_FCR, PXA2X0_UART_FCR_FCR0 |
PXA2X0_UART_FCR_FCR1 | PXA2X0_UART_FCR_FCR2);
 // Enable Transmit, Receive interrupt.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_TIE |
PXA2X0_UART_IER_RAVIE | PXA2X0_UART_IER_UUE);
#endif
 return true;
}

static bool triton_serial_init(struct cyg_devtab_entry *tab)
{
    serial_channel *chan = (serial_channel *)tab->priv;
    triton_serial_info *triton_chan = (triton_serial_info *) chan->dev_priv;
    int res;
#ifdef CYGDBG_IO_INIT
    diag_printf("TRITON SERIAL init - dev: %x.%d\n", triton_chan->base,
triton_chan->int_num);
#endif
 // Really only required for interrupt driven devices.
    (chan->callbacks->serial_init)(chan);
  if(chan->out_cbuf.len != 0)
  {
      cyg_drv_interrupt_create(triton_chan->int_num,
                                 4, // Priority
                                 (cyg_addrword_t)chan, // Data item passed
to interrupt handler
                                 (cyg_ISR_t *)&triton_serial_ISR,
                                 (cyg_DSR_t *)&triton_serial_DSR,
                                 &triton_chan->serial_interrupt_handle,
                                 &triton_chan->serial_interrupt);
        cyg_drv_interrupt_attach(triton_chan->serial_interrupt_handle);
        cyg_drv_interrupt_unmask(triton_chan->int_num);
    }
    res = triton_serial_config_port(chan, &chan->config, true);
    return res;
}

Any help would be greatly appreciated.

Regards,

Himanshu Patel



-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [ECOS] Serial Driver (Interrupt Mode) for PXA250
  2006-08-22 12:47 Himanshu Patel
@ 2006-08-22 13:00 ` Gary Thomas
  0 siblings, 0 replies; 3+ messages in thread
From: Gary Thomas @ 2006-08-22 13:00 UTC (permalink / raw)
  To: Himanshu Patel; +Cc: ecos-discuss

Himanshu Patel wrote:
> ----- Original Message ----- 
> From: Himanshu Patel
> To: ecos-discuss@ecos.sourceware.org
> Sent: Tuesday, August 22, 2006 6:17 PM
> Subject: Re: [ECOS] Serial Driver (Interrupt Mode) for PXA250
> 
> 
> Hi,
> 
> Any ideas? Let me know if any additional information is required.

Why aren't you just using the generic 16x5x driver?  Look at how I
did it for the uE250 which is another PXA250 based system.

> 
> Regards,
> 
> Himanshu Patel
> ----- Original Message ----- 
> From: Himanshu Patel
> To: ecos-discuss@ecos.sourceware.org
> Sent: Monday, August 21, 2006 7:11 PM
> Subject: [ECOS] Serial Driver (Interrupt Mode) for PXA250
> 
> 
> Hi,
> 
> I am working on PXA250 development board.  ISR (and hence DSR) is not
> getting fired for FFUART (Serial Driver works well in Polling Mode).
> 
> Sending herewith code for Initialization and Configuration for reference:
> 
> #define PXA2X0_FFUART0     0x40100000
> #define CYGNUM_HAL_INTERRUPT_USART0  (22)
> 
> static bool triton_serial_config_port(serial_channel *chan,
> cyg_serial_info_t *new_config, bool init)
> {
>     triton_serial_info *triton_chan = (triton_serial_info *)chan->dev_priv;
>     CYG_ADDRWORD base = triton_chan->base;
>    cyg_uint32 baudrate;
>  cyg_uint32 parity = select_parity((cyg_uint32) new_config->parity);
>     cyg_uint32 word_length = select_word_length((cyg_uint32)
> new_config->word_length);
>     cyg_uint32 stop_bits = select_stop_bits((cyg_uint32) new_config->stop);
>     if ((word_length == 0xFF) || (parity == 0xFF) || (stop_bits == 0xFF))
>  {
>         return false;  // Unsupported configuration
>     }
>  // Enable Divisor Latch Access Bit in Line Control Register.
>  HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, PXA2X0_UART_LCR_DLAB);
>  baudrate = select_baudrate((cyg_uint32) new_config->baud);
>  // Divisor Latch Low Register
>  HAL_WRITE_UINT32(base + PXA2X0_UART_DLL, (baudrate & 0xFF));
>  // Divisor Latch High Register
>  HAL_WRITE_UINT32(base + PXA2X0_UART_DLH, ((baudrate & 0xFF00) >> 8));
>  // Disable Divisor Latch Access Bit in Line Control Register.
>  // Reset the Line Control Register.
>  HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, 0x00);
>  // Configure Line Control Register
>  HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, parity | word_length | stop_bits);
>  // Disable UART interrupts.
>  HAL_WRITE_UINT32(base + PXA2X0_UART_IER, 0x00000000);
>  // Enable UART Unit.
>  HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_UUE);
> #if CYGNUM_IO_SERIAL_ARM_TRITON_SERIAL0_BUFSIZE > 0
>  // Enable Transmit and Receive FIFO
>  HAL_WRITE_UINT32(base + PXA2X0_UART_FCR, PXA2X0_UART_FCR_FCR0 |
> PXA2X0_UART_FCR_FCR1 | PXA2X0_UART_FCR_FCR2);
>  // Enable Transmit, Receive interrupt.
>  HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_TIE |
> PXA2X0_UART_IER_RAVIE | PXA2X0_UART_IER_UUE);
> #endif
>  return true;
> }
> 
> static bool triton_serial_init(struct cyg_devtab_entry *tab)
> {
>     serial_channel *chan = (serial_channel *)tab->priv;
>     triton_serial_info *triton_chan = (triton_serial_info *) chan->dev_priv;
>     int res;
> #ifdef CYGDBG_IO_INIT
>     diag_printf("TRITON SERIAL init - dev: %x.%d\n", triton_chan->base,
> triton_chan->int_num);
> #endif
>  // Really only required for interrupt driven devices.
>     (chan->callbacks->serial_init)(chan);
>   if(chan->out_cbuf.len != 0)
>   {
>       cyg_drv_interrupt_create(triton_chan->int_num,
>                                  4, // Priority
>                                  (cyg_addrword_t)chan, // Data item passed
> to interrupt handler
>                                  (cyg_ISR_t *)&triton_serial_ISR,
>                                  (cyg_DSR_t *)&triton_serial_DSR,
>                                  &triton_chan->serial_interrupt_handle,
>                                  &triton_chan->serial_interrupt);
>         cyg_drv_interrupt_attach(triton_chan->serial_interrupt_handle);
>         cyg_drv_interrupt_unmask(triton_chan->int_num);
>     }
>     res = triton_serial_config_port(chan, &chan->config, true);
>     return res;
> }
> 
> Any help would be greatly appreciated.
> 
> Regards,
> 
> Himanshu Patel
> 
> 


-- 
------------------------------------------------------------
Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
------------------------------------------------------------

-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [ECOS] Serial Driver (Interrupt Mode) for PXA250
@ 2006-08-22 12:47 Himanshu Patel
  2006-08-22 13:00 ` Gary Thomas
  0 siblings, 1 reply; 3+ messages in thread
From: Himanshu Patel @ 2006-08-22 12:47 UTC (permalink / raw)
  To: ecos-discuss

----- Original Message ----- 
From: Himanshu Patel
To: ecos-discuss@ecos.sourceware.org
Sent: Tuesday, August 22, 2006 6:17 PM
Subject: Re: [ECOS] Serial Driver (Interrupt Mode) for PXA250


Hi,

Any ideas? Let me know if any additional information is required.

Regards,

Himanshu Patel
----- Original Message ----- 
From: Himanshu Patel
To: ecos-discuss@ecos.sourceware.org
Sent: Monday, August 21, 2006 7:11 PM
Subject: [ECOS] Serial Driver (Interrupt Mode) for PXA250


Hi,

I am working on PXA250 development board.  ISR (and hence DSR) is not
getting fired for FFUART (Serial Driver works well in Polling Mode).

Sending herewith code for Initialization and Configuration for reference:

#define PXA2X0_FFUART0     0x40100000
#define CYGNUM_HAL_INTERRUPT_USART0  (22)

static bool triton_serial_config_port(serial_channel *chan,
cyg_serial_info_t *new_config, bool init)
{
    triton_serial_info *triton_chan = (triton_serial_info *)chan->dev_priv;
    CYG_ADDRWORD base = triton_chan->base;
   cyg_uint32 baudrate;
 cyg_uint32 parity = select_parity((cyg_uint32) new_config->parity);
    cyg_uint32 word_length = select_word_length((cyg_uint32)
new_config->word_length);
    cyg_uint32 stop_bits = select_stop_bits((cyg_uint32) new_config->stop);
    if ((word_length == 0xFF) || (parity == 0xFF) || (stop_bits == 0xFF))
 {
        return false;  // Unsupported configuration
    }
 // Enable Divisor Latch Access Bit in Line Control Register.
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, PXA2X0_UART_LCR_DLAB);
 baudrate = select_baudrate((cyg_uint32) new_config->baud);
 // Divisor Latch Low Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_DLL, (baudrate & 0xFF));
 // Divisor Latch High Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_DLH, ((baudrate & 0xFF00) >> 8));
 // Disable Divisor Latch Access Bit in Line Control Register.
 // Reset the Line Control Register.
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, 0x00);
 // Configure Line Control Register
 HAL_WRITE_UINT32(base + PXA2X0_UART_LCR, parity | word_length | stop_bits);
 // Disable UART interrupts.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, 0x00000000);
 // Enable UART Unit.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_UUE);
#if CYGNUM_IO_SERIAL_ARM_TRITON_SERIAL0_BUFSIZE > 0
 // Enable Transmit and Receive FIFO
 HAL_WRITE_UINT32(base + PXA2X0_UART_FCR, PXA2X0_UART_FCR_FCR0 |
PXA2X0_UART_FCR_FCR1 | PXA2X0_UART_FCR_FCR2);
 // Enable Transmit, Receive interrupt.
 HAL_WRITE_UINT32(base + PXA2X0_UART_IER, PXA2X0_UART_IER_TIE |
PXA2X0_UART_IER_RAVIE | PXA2X0_UART_IER_UUE);
#endif
 return true;
}

static bool triton_serial_init(struct cyg_devtab_entry *tab)
{
    serial_channel *chan = (serial_channel *)tab->priv;
    triton_serial_info *triton_chan = (triton_serial_info *) chan->dev_priv;
    int res;
#ifdef CYGDBG_IO_INIT
    diag_printf("TRITON SERIAL init - dev: %x.%d\n", triton_chan->base,
triton_chan->int_num);
#endif
 // Really only required for interrupt driven devices.
    (chan->callbacks->serial_init)(chan);
  if(chan->out_cbuf.len != 0)
  {
      cyg_drv_interrupt_create(triton_chan->int_num,
                                 4, // Priority
                                 (cyg_addrword_t)chan, // Data item passed
to interrupt handler
                                 (cyg_ISR_t *)&triton_serial_ISR,
                                 (cyg_DSR_t *)&triton_serial_DSR,
                                 &triton_chan->serial_interrupt_handle,
                                 &triton_chan->serial_interrupt);
        cyg_drv_interrupt_attach(triton_chan->serial_interrupt_handle);
        cyg_drv_interrupt_unmask(triton_chan->int_num);
    }
    res = triton_serial_config_port(chan, &chan->config, true);
    return res;
}

Any help would be greatly appreciated.

Regards,

Himanshu Patel


-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss



-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

^ permalink raw reply	[flat|nested] 3+ messages in thread
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2006-08-21 13:39 [ECOS] Serial Driver (Interrupt Mode) for PXA250 Himanshu Patel
2006-08-22 12:47 Himanshu Patel
2006-08-22 13:00 ` Gary Thomas

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