From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Xavier Wang" To: Subject: [ECOS] nested interrupts Date: Wed, 17 Jan 2001 23:51:00 -0000 Message-id: <003b01c0811f$196395e0$6f2314ac@realtek.com.tw> X-SW-Source: 2001-01/msg00298.html I got confused about nested interrupts. In http://sources.redhat.com/ecos/docs-latest/porting/hal-interrupts.html it seems that interrupts are disabled in ISRs, but enabled in DSRs. But Hugo's description in the same page said that higher priority interrupts are enabled before calling ISR. Which is true for nested interrupts? If it's the former, should I rewrite the 'hal_cpu_int_enable' macro used in hal_interrupt_stack_call_pending_DSRs (in vector.S) to enable only higher priority interrupts? If it's the latter, what should I do to support nested interrupts? (I'm using TX39/JMR3904 platform, eCos version 1.3.1) Besides, by looking into the source code, it seems that if there is any pending DSRs, no thread will be run. So can a high priority thread be blocked by a low priority interrupt (DSR)? Will it introduce some problems for a real-time application? Thanks.