Re: [ECOS] Porting eCos to DDB-VRC4375(Memory mapping)

["Ling Su" <lingsu@palmmicro.com>]

Dear Nick,

Thanks a lot for you helpful explaination! I found it is not consistent for
the mlt_mips_vr4300_vrc4373_rom.ldi, mlt_mips_vr4300_vrc4373_rom.mlt, and
mlt_mips_vr4300_vrc4373_rom.h. Supposely the *.ldi and *.h are both
generated by *.mlt, right? but in in mlt_mips_vr4300_vrc4373_rom.ldi and
mlt_mips_vr4300_vrc4373_rom.h, we can find the ram ORIGIN is 0x80000200
LENGTH is 0x7fe00. Any particular reason for this? I am a little bit
confused.

Regards,
-Ling


>
> <2>. In the mlt_mips_vr4300_vrc4373_rom.ldi,
> MEMORY
> {
>     ram: ORIGIN = 0x80000800, LENGTH = 0x7F800
>     rom: ORIGIN = 0xBFC0000, LENGTH = 0x80000
> }
> I don't quite understand the ram LENGTH setting, why we just use 512KB ram
> in rom start up setting? Can we set the ram LENGTH to larger. Another
thing
> is why its ORIGIN is 0x80000800?

Again, the RAM length is probably just left over from an earlier
version of the code. Generally we use the ROMRAM startup for all
VRC4373 non-RAM configurations, I suspect that the ROM startup has not
been used for a long time and has not been kept up to date.

The RAM starts at 0x80000800 because we have various tables defined to
go into low RAM. Below 0x80000400 there are hardware defined interrupt
vectors. We have the VSR table at 0x80000400 and the vector table at
0x80000600.