From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11427 invoked by alias); 2 Aug 2004 16:51:22 -0000 Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Received: (qmail 11413 invoked from network); 2 Aug 2004 16:51:19 -0000 Received: from unknown (HELO mail.marakicorp.com) (209.20.251.202) by sourceware.org with SMTP; 2 Aug 2004 16:51:19 -0000 Received: from krishnagdev ([192.168.1.103]) by mail.marakicorp.com (Merak 6.2.1) with SMTP id JGA37966; Mon, 02 Aug 2004 09:51:20 -0700 Message-ID: <066501c478b0$aa05a390$6701a8c0@marakicorp.com> From: "Krishna Ganugapati" To: "Gary Thomas" Cc: References: <1090406873.15766.20.camel@famine> <20040802130134.GI14248@lunn.ch> <1091454300.12336.110.camel@famine> <20040802140249.GK14248@lunn.ch> <1091456094.12336.120.camel@famine> <20040802142711.GM14248@lunn.ch> <063e01c4789f$e4c9f370$6701a8c0@marakicorp.com> <1091458778.12242.24.camel@hermes> <064e01c478a3$219df960$6701a8c0@marakicorp.com> <1091460056.12242.69.camel@hermes> Date: Mon, 02 Aug 2004 16:51:00 -0000 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [ECOS] Question on wigglers, debugging Redboot in flash fortheXScale target in single step mode X-SW-Source: 2004-08/txt/msg00031.txt.bz2 Thanks Gary. I'm investigating why the single step fails, (I've sent logs to Macraigor). Thanks for the tip on BDI2000 - I hope to switch debuggers and JTAG devices. -- Krishna ------------------------------------------------- ----- Original Message ----- From: "Gary Thomas" To: "Krishna Ganugapati" Cc: Sent: Monday, August 02, 2004 8:20 AM Subject: Re: [ECOS] Question on wigglers, debugging Redboot in flash fortheXScale target in single step mode > On Mon, 2004-08-02 at 09:12, Krishna Ganugapati wrote: > > Gary, Thanks for the response. > > > > I'm afraid I don't quite understand what you're saying.. > > > > a) > Why do you think this is wrong? When you reset the board, single > > > stepping (via hardware which is very different that what you describe in > > > item "c" above), you should execute the "reset handler" an instruction > > > at a time. This is just what is supposed to happen. > > > > Are you saying that this is correct behavior? > > Yes. > > > > > When I hit the reset vector, I'm stuck.. subsequent single steps only keep > > me at the reset vector - I don't advance any further.. > > > > b) How do I debug my redboot image? > > Figure out the answer to why single step doesn't progress, then you'll > be able to debug RedBoot. You _should_ be able to do this with the > hardware you have, but alas you may have problems. Given that MacRaigor > doesn't really support OCD and the Wiggler is pretty primitive and ... > > You might consider getting a more powerful debug tool, especially if > debugging hardware [initialization] is new to you. One of the best > available is the BDI2000 from Abatron, but there are many others. > > > ------------------------------------------------- > > ----- Original Message ----- > > From: "Gary Thomas" > > To: "Krishna Ganugapati" > > Cc: > > Sent: Monday, August 02, 2004 7:59 AM > > Subject: Re: [ECOS] Question on wigglers, debugging Redboot in flash forthe > > XScale target in single step mode > > > > > > > On Mon, 2004-08-02 at 08:49, Krishna Ganugapati wrote: > > > > Hello, > > > > > > > > I'm looking for some clarification on the following issues. > > > > > > > > Target;: Custom IXP425 XScale (almost identical to the IXDP development > > > > board, minus the highspeed UART and minus the LEDs), Redboot in ROM > > mode. > > > > Debugging interface: Macraigor Wiggler, OCD Commander for the software > > > > debugger on the host. > > > > > > > > Situation: I can successfully download my redboot rom image to Flash > > using > > > > the Wiggler and the Macraigor Flash Programmer. > > > > When I reset my target, I connect to the JTAG port using the OCD > > Commander > > > > debugger and attempt to single step through instructions. > > > > > > > > Results > > > > > > > > 1) Through the OCD Debugger, I note that Flash memory is correctly > > relocated > > > > at 0x000000000. > > > > 2) Using the OCD Debugger, I can manual configure the SDRAM registers > > and > > > > determine that my SDRAM acc ANy recess is good. I flip the > > > > EXP_BUS_CONFIGURATION bits that switc SDRAM and Flash around and > > determine > > > > that SDRAM is now located at 0x00000000 - I can successfully read and > > write > > > > words to the first 256 MB so I am assuming memory is good. > > > > > > > > 3) Reset the board, board is now in bootup mode, flash is at 0x00000000. > > I > > > > now attempt to single step through my redboot rom image. On the first > > > > instruction, the board transfers control to the reset handler. > > > > > > > > Questions: > > > > > > > > a) Has anyone seen behavior like this? > > > > b) On the web it looks like quite a few people have seen something like > > > > this, but there have been no followups on how to fix this. > > > > c) When I reviewed the XScale documentation, it says that when a > > debugger > > > > executes a single step instruction, a debug event handler is expected > > and > > > > that this debug event handler is overloaded at the reset handler. It > > also > > > > says that the debug event handler code needs to be downloaded to the > > target > > > > through the JTAG. Questions: > > > > i) Does the OCD Commander software debugger interface actually > > download > > > > a debug event handler? If it does, then my conclusions are wrong and I > > have > > > > to look elsewhere for why things in single step are not progressing, but > > if > > > > I'm right, then perhaps I need a more sophisticated debugger for my JTAG > > > > interface (the OCD Commander is free). Any recommendations > > > > > > Why do you think this is wrong? When you reset the board, single > > > stepping (via hardware which is very different that what you describe in > > > item "c" above), you should execute the "reset handler" an instruction > > > at a time. This is just what is supposed to happen. > > > > > > > > > > > Other clarifications: > > > > 1) One thing that was not very clear in XScale little endian vs big > > endian > > > > modes was the opcode fetch modes for the XScale. After investigating, my > > > > understanding is that whether in big endian or in little endian mode, > > > > XScale opcode fetches are always in little endian mode. Which is why > > when > > > > you build a big endian target for the XScale IXP425 board which > > generates > > > > the instructions in big endian mode, you need to byte swap the image. Is > > > > this correct? > > > > > > > > Thanks for any input. > > > > > > > > Krishna > > > -- > > > Gary Thomas > > > MLB Associates > > > > -- > Gary Thomas > MLB Associates > > > -- > Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos > and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss > -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss