[ECOS] EB40A flash impl. questions

[ECOS] EB40A flash impl. questions

[George J. Pantazopoulos]

Hi all,

    According to the EB40A schematics ("Flash Memory Devices", figure
6-8 page 6-9), the AT49BV1614 part's RDY/~BUSY line is connected to the
AT91R4K8's P10/IRQ1 line. However, I don't see any reference to this
connection in the file

ecos-cvs/packages/devs/flash/atmel/at49xxxx/current/include/flash_at49xxxx.inl

Instead, I see (on lines 77 and 78)

#define FLASH_Busy            FLASHWORD( 0x40 ) // "Toggle" bit, I/O 6
#define FLASH_InverseData   FLASHWORD( 0x80 ) // I/O 7, Inverse data

---------------
Some questions:
---------------

What is this InverseData term? 

I do not see any references to pins P6 or P7 in the schematic, so what
is meant by "I/O 6" and "I/O 7" in the flash_at49xxxx.inl file ?

How does eCos determine the Busy status the the flash chip? I don't see
a reference to CYGNUM_HAL_INTERRUPT_EXT1 (IRQ1), or to the P10 line
shown in the schematic. It appears to use a busy loop with
FLASH_InverseData somehow, but I dont know what InverseData is or does.

Since this flash driver does not appear to use the P10/IRQ1 line (or the
RDY/~BUSY pin on the flash chip), does this mean that I can use the IRQ1
line for my own purposes?

If this info is available somewhere, please point me in that direction.

Thanks,
George Pantazopoulos
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