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From: Gary Thomas <gary@mlbassoc.com>
To: Jay Foster <jay@systech.com>
Cc: "'ecos-discuss@ecos.sourceware.org'" <ecos-discuss@ecos.sourceware.org>
Subject: Re: [ECOS] Flash Driver Read/Write Alignment Question
Date: Fri, 09 Jun 2006 18:02:00 -0000	[thread overview]
Message-ID: <1149876136.22880.60.camel@hermes> (raw)
In-Reply-To: <74C9525D67A5FF4791614FDB06593BB1028626@mail.systech.com>

On Fri, 2006-06-09 at 10:06 -0700, Jay Foster wrote:
> I am puzzling over how the eCos flash drivers are supposed to work when
> using 16-bit wide flash devices.  I'm using an ARM architecture (ARM7TDMI,
> ARM940T), and the AMD AM29LV160 flash device connected in the 16-bit wide
> mode (CYGNUM_FLASH_WIDTH=16).
> 
> Looking at the flash driver code, this defines the flash_data_t as a 16-bit
> type.  This results in all accesses to the flash device to be performed as
> 16-bit reads/writes.
> 
> The flash driver defines some special addresses (FLASH_Setup_Addr1,
> FLASH_Setup_Addr2, etc.).  At least one of these will be defined as an odd
> address.  This will result in an unaligned transfer, causing a DATA ABORT
> exception.  What am I missing here?

They should not end up at odd addresses since they are cast to the
FLASH element type.  If this is 16 bit, Addr(0xA55) == 0x14AA, etc.

If you're ending up with alignment issues, then you've configured
your FLASH driver incorrectly (check the defines).  There are lots
of examples of 16 and 32 bit device setups, as well as some parallel
and banked layouts.

-- 
------------------------------------------------------------
Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
------------------------------------------------------------


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  reply	other threads:[~2006-06-09 18:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-06-09 17:10 Jay Foster
2006-06-09 18:02 ` Gary Thomas [this message]
2006-06-09 18:47 Jay Foster
2006-06-09 19:05 ` Gary Thomas
2006-06-09 20:46 Jay Foster

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