From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3150 invoked by alias); 7 Jun 2007 04:08:51 -0000 Received: (qmail 3142 invoked by uid 22791); 7 Jun 2007 04:08:50 -0000 X-Spam-Check-By: sourceware.org Received: from mx01.telus.net (HELO mx01.telus.net) (204.209.205.52) by sourceware.org (qpsmtpd/0.31) with ESMTP; Thu, 07 Jun 2007 04:08:48 +0000 Received: from priv-edmwaa05.telusplanet.net ([154.20.174.236]) by priv-edmwes23.telusplanet.net (InterMail vM.7.08.02.00 201-2186-121-20061213) with ESMTP id <20070607040845.ACE21443.priv-edmwes23.telusplanet.net@priv-edmwaa05.telusplanet.net>; Wed, 6 Jun 2007 22:08:45 -0600 Received: from [192.168.1.126] (d154-20-174-236.bchsia.telus.net [154.20.174.236]) by priv-edmwaa05.telusplanet.net (BorderWare MXtreme Infinity Mail Firewall) with ESMTP id 4BHRPU0V00; Wed, 6 Jun 2007 22:08:45 -0600 (MDT) From: Daniel Helgason To: Mike Sweeney Cc: ecos-discuss@ecos.sourceware.org In-Reply-To: <70d4f620706062016s593a05aen95aebfdad3f4ecf@mail.gmail.com> References: <70d4f620706062016s593a05aen95aebfdad3f4ecf@mail.gmail.com> Content-Type: text/plain Date: Thu, 07 Jun 2007 10:01:00 -0000 Message-Id: <1181189324.13729.57.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.6.3 (2.6.3-2.fc5) Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Subject: Re: [ECOS] HAL_INTERRUPT_ACKNOWLEDGE question X-SW-Source: 2007-06/txt/msg00078.txt.bz2 On Wed, 2007-06-06 at 23:16 -0400, Mike Sweeney wrote: > I am a little confused about what HAL_INTERRUPT_ACKNOWLEDGE is > intended to do. The reference manual for eCos says that it is used if > the interrupt controller requires you to acknowledge an interrupt. The > reason I am confused is that an interrupt service routine for a device > may need to clear a status flag in a peripheral status register even > if there is no interrupt controller. Is the intent that each interrupt > service routine handle this clearing of the flag in the peripheral > status register on its own, in addition to calling > HAL_INTERRUPT_ACKNOWLEDGE for handling anything that has to do with > the interrupt controller? > ... I think this is because the interrupt controller is a shared resource and there may be some 'stacking' and 'unstacking' of state required to manage it and the priorities of interrupts that use it. Each interrupt routine usually has exclusive access to the peripheral that caused the interrupt and so the routine can directly handle interrupt-related registers in the peripheral, but some, most, or all peripheral interrupts might be channelled through the shared interrupt controller in a target-specific way. Generally, interrupts from higher priority sources are masked by the interrupt controller until HAL_INTERRUPT_ACKNOWLEDGE is called. If you don't have an interrupt controller, then the HAL_INTERRUPT_ACKNOWLEDGE macro/function is going to be very small if it exists at all. -- +--------------------------------------------- | Daniel Helgason -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss