From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30587 invoked by alias); 30 Apr 2005 16:23:15 -0000 Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Received: (qmail 30471 invoked from network); 30 Apr 2005 16:23:05 -0000 Received: from unknown (HELO web42004.mail.yahoo.com) (66.218.93.172) by sourceware.org with SMTP; 30 Apr 2005 16:23:05 -0000 Received: (qmail 13470 invoked by uid 60001); 30 Apr 2005 16:23:04 -0000 Message-ID: <20050430162304.13468.qmail@web42004.mail.yahoo.com> Received: from [70.92.128.97] by web42004.mail.yahoo.com via HTTP; Sat, 30 Apr 2005 09:23:04 PDT Date: Sat, 30 Apr 2005 16:38:00 -0000 From: Reply-To: xinumike-rtos@yahoo.com To: Gary Thomas , xinumike-rtos@yahoo.com Cc: eCos Discussion In-Reply-To: 6667 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: Re: [ECOS] Redboot & Powerpc: memory remap X-SW-Source: 2005-04/txt/msg00313.txt.bz2 Gary, Thanks a lot for your response. I am still a tiny bit confused, and the source code is on my laptop in the office, so I hope you don't mind one more answer. It would seem to me, that as soon as the code remaps CS0 from 0 to 0xff000000, the program counter would be messed up and we would be off in the weeds. Obviously that is not what happens...so how does that work? Also, it is possible to download through a BDM and run right from RAM to debug, correct? Thanks a lot for your help. I really appreciate it. -Mike --- Gary Thomas wrote: > On Sat, 2005-04-30 at 04:44 -0700, > xinumike-rtos@yahoo.com wrote: > > Powerpc question: > > Ok, I understand chip select 0 is mapped to 0 > > upon reset and then it is remapped to something > > like 0xfe000000. I understand that SDRAM will > > be remapped to 0. Where does this remapping > > take place (what file or files?)? > > > > How does redboot do this remapping? Does it > execute > > out of dual port ram for a while? > > > > I know my answers are dig in the code, but if > somebody > > could give me a headstart what files to pay > > particular attention too, I would appreciate it. > > Is there any documentation that talks about > > the boot process? > > This happens in the machine setup code which on > PowerPC systems > is called 'hal_hardware_init'. For an example, look > at the > Viper startup in: > .../hal/powerpc/viper/current/src/viper.S > > When the processor is reset, *ALL* accesses go > through CS0 > which implicitly maps *EVERYTHING*. Thus, for the > first few > instructions, the only thing that can be accessed is > the FLASH > and the CPU control registers known as IMM in the > code. The > first thing this code does is to tell the IMM how to > map FLASH > at 0xFE000000 via CS0 and SDRAM at 0x00000000 via > CS1. It then > programs the UPM (a microcoded SDRAM controller). > Once this is > done, FLASH and RAM can be accessed and the rest of > the system > can be initialized. > > The details of how all of this works are in the > MPC860 users > manual (PDF available directly from > FreeScale/Motorola) > > Note: this is all very hardware specific. Machine > initialization > is different on MPC8xx from MPC8xxx or ARM or 80x86 > or ... > You have to know your platform :-) > > -- > ------------------------------------------------------------ > Gary Thomas | Consulting for the > MLB Associates | Embedded world > ------------------------------------------------------------ > > > -- > Before posting, please read the FAQ: > http://ecos.sourceware.org/fom/ecos > and search the list archive: > http://ecos.sourceware.org/ml/ecos-discuss > > -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss