Re: [ECOS] ROMable Code Still having problems

[ken king <kknhuntsville@yahoo.com>]

It seems to stop or hang-up while coping FLASH to RAM
after the 1st word is copied (I started with the adder
code).

Actually, sometimes it just stops -- no bus activity.
I found this in variant.inc
	
	.macro hal_cpu_init
        # Disable special MPC8xx "development support"
which
	# suppresses trace exceptions. The CPU seems to hang,
not 
        # executing from offset 0x1e00(?) as expected.
        lwi	r3,0x00000007
        mtspr	ICTRL,r3
        li      r3,0
        mtspr   DER, r3

If I change the 0x7 to a 0 -- it starts to write to
the terminal before "stopping".

Anybody remember this??


--- ken king <kknhuntsville@yahoo.com> wrote:
> I have a MPC852T custom bd I've been running
> with a BDM. Most every thing is working.I tried to
> make this system boot from FLASH.
> 
> Okay, it works with a BDM connected, with *almost*
> no .gdbinit -- i.e. only target type and
> remote (IP:Port) (just enough to connect) -- no
> monitor or set commands -- no program load!
> 
> I can disconnect the BDM after it boots,
> everything keeps running fine.
> 
> Question is; what module might I have forgotten to
> load that gdb/BDM might be handling for me???
> 
> I've single stepped through hal_hardware_init,
> everything looks fine. /CS init, copy ROM to RAM,
> etc.
> 
> Looked at the ROM /CS with and without the BDM with
> scope, signature looks about the same -- ?burst of
> copy? ROM to RAM.
> 
> I know that *part* of hal_hardware_init works,
> because the clocks change to the right frequency.
> 
> I don't *think* CPU is going into debug mode as
> VFLS{0..1] were never seen to both be asserted.
> 
> Any ideas? 
> 
> TIA,
> KK
> 
> 
> 
> 
> 
> 
> 
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