[ECOS] at91_misc.c patch proposal

["Ezequiel Augusto Cachão Conde" <ezeq@cc.isel.ipl.pt>]

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Hi, 


I found a small bug in hal_delay_us. Once the timer is started it continues
running beyond the first counting. If hal_delay is called again, after a
complete counting, CPC flag is already set.

My patch simply clears the status flags before initiate a new delay.
 

Thanks

Ezequiel

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Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/ChangeLog,v
retrieving revision 1.27
diff -u -5 -p -r1.27 ChangeLog
--- ChangeLog	12 Nov 2004 09:45:15 -0000	1.27
+++ ChangeLog	30 May 2005 14:58:19 -0000
@@ -1,5 +1,10 @@
+
+2005-05-30  Ezequiel Conde <ezeq@cc.isel.ipl.pt>
+
+	* src/at91_misc.c ( hal_delay_us ): Clear status before running delay
+	
 2004-11-12  Jani Monoses <jani@iv.ro>
 
 	* include/var_io.h: Added defines for some missing UART bits,
 	corrected a few timer capture mode register bits.
 
Index: src/at91_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/src/at91_misc.c,v
retrieving revision 1.10
diff -u -5 -p -r1.10 at91_misc.c
--- src/at91_misc.c	25 Sep 2004 09:44:10 -0000	1.10
+++ src/at91_misc.c	30 May 2005 14:58:21 -0000
@@ -146,10 +146,13 @@ void hal_delay_us(cyg_int32 usecs)
     // Set registers
     HAL_WRITE_UINT32(timer+AT91_TC_CMR, AT91_TC_CMR_CLKS_MCK32);  // 1MHz
     HAL_WRITE_UINT32(timer+AT91_TC_RA, 0);
     HAL_WRITE_UINT32(timer+AT91_TC_RC, ticks);
 
+	// Clear status flags
+    HAL_READ_UINT32(timer+AT91_TC_SR, stat);
+
     // Start timer
     HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_TRIG | AT91_TC_CCR_CLKEN);
 
     // Wait for the compare
     do {


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