From: Andrew Lunn <andrew@lunn.ch>
To: ariga masahiro <ariga@link-lab.co.jp>
Cc: ecos-discuss@ecos.sourceware.org
Subject: Re: [ECOS] Where set SMSC-LAN91C111 registers for availing interrupt ?
Date: Wed, 29 Aug 2007 08:11:00 -0000 [thread overview]
Message-ID: <20070829081108.GI31057@lunn.ch> (raw)
In-Reply-To: <001b01c7ea05$68ebd310$1c0110ac@ariga>
> According to SMSC's FAQ,in order to enable interrupt, PHY Register 19's
> MINT bit should be set to '0',
I've not read the data sheet/FAQ, so i need to ask maybe some dumb
questions. This is a PHY register. So does this interrupt tell you
about change in Link status? Cable in, cable out, etc? If so, eCos
does not use this information. There is no need to generate such
interrupts.
> and MAC Bank 2 Offset D Interrupt Mask Register's MDINT should be set to
> '1'.
What about the code at line 520 of version 1.20 of
/packages/devs/eth/smsc/lan91cxx/current/src/if_lan91cxx.c. Does the
set all the necessary bits?
Ah, i just took a very quick look at the datasheet. MDINT is also for
PHY interrupts. MD probably stands for Media Detect. eCos is not
interests in these interrupts. eCos just wants to know when a packet
has been received, when a packet has been sent etc. These are the MAC
interrupts which do see to be configured at the line is said in my
last email.
Andrew
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prev parent reply other threads:[~2007-08-29 8:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-08-29 6:25 ariga masahiro
2007-08-29 7:49 ` Andrew Lunn
2007-08-29 8:11 ` Andrew Lunn [this message]
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