Re: [ECOS] LPC2XXX watchdog feeds and interrupts

Re: [ECOS] LPC2XXX watchdog feeds and interrupts

[Sergei Gavrikov]

On Mon, Oct 26, 2009 at 08:58:19PM +1100, Laurie Gellatly wrote:
> Hi All, I using an ARM 7 (LPC2212) based on an eCosCentric build. It
> appears that watchdog feeds are done with interrupts enabled yet the
> NXP manual warns against leaving interrupts enabled during a feed
> sequence (and I'm pretty sure I've seen the consequences).  Firstly,
> have I missed something? Are interrupts disabled and I just don't
> see where when I call watchdog_reset() OR should I be adding
> cyg_interrupt_disable() and cyg_interrupt_enable() calls around the
> feed sequence in watchdog_lpc2xxx.cxx
> 
> Thanks			...Laurie:{)

Hello Laurie,

I found no any global interrupt disabling/enabling workaround for eCos
io/watchdog *::reset. More that the most targets as I could see have a
peace with CPU's watchdog with a single atomic write, but NXP and some
other targets claim two writes (!atomic operation): devs/watchdog/*

Well, NXP points on such a claim, for example, in this application
note
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/an10414.pdf
and in their other data sheets. Well, may be that is rare condition:
to break two sequenced  writes, but safety is safety :-) Could you
provide a patch for the issue, please`?

IMO, you would add some CDL in devs/watchdog/arm/lpc2xxx/*/*, e.g.
CYGOPT_DEVICES_WATCHDOG_ARM_LPC2XXX_RESET_SAFE to wrap that reset,
well, to add something likes the below

    int old;
    HAL_DISABLE_INTERRUPTS( old );
    /* Feed magic values to reset the watchdog. */
    /* ... */
    HAL_RESTORE_INTERRUPTS( old );

But, as I could understand, you pointed on eCosCentric build.

HTH

Sergei

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Re: [ECOS] LPC2XXX watchdog feeds and interrupts

[Laurie Gellatly]

Hi Sergei,
Two things. It should not be an option as when the feed sequence is  
eventually interrupted and the processor is reset it can be VERY time  
consuming to track down. I know from bitter experience.
The other is I was not sure about which interrupt disable/enable  
function pairs to use. Is HAL_DISABLE_INTERRUPTS preferred over  
cyg_disable_interrupts?
We need ALL interrupts off during the feed.

         ...Laurie:{)
+61 416 114419


On 27/10/2009, at 7:40 AM, Sergei Gavrikov <sergei.gavrikov@gmail.com>  
wrote:

> On Mon, Oct 26, 2009 at 08:58:19PM +1100, Laurie Gellatly wrote:
>> Hi All, I using an ARM 7 (LPC2212) based on an eCosCentric build. It
>> appears that watchdog feeds are done with interrupts enabled yet the
>> NXP manual warns against leaving interrupts enabled during a feed
>> sequence (and I'm pretty sure I've seen the consequences).  Firstly,
>> have I missed something? Are interrupts disabled and I just don't
>> see where when I call watchdog_reset() OR should I be adding
>> cyg_interrupt_disable() and cyg_interrupt_enable() calls around the
>> feed sequence in watchdog_lpc2xxx.cxx
>>
>> Thanks            ...Laurie:{)
>
> Hello Laurie,
>
> I found no any global interrupt disabling/enabling workaround for eCos
> io/watchdog *::reset. More that the most targets as I could see have a
> peace with CPU's watchdog with a single atomic write, but NXP and some
> other targets claim two writes (!atomic operation): devs/watchdog/*
>
> Well, NXP points on such a claim, for example, in this application
> note
> http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/an10414.pdf
> and in their other data sheets. Well, may be that is rare condition:
> to break two sequenced  writes, but safety is safety :-) Could you
> provide a patch for the issue, please`?
>
> IMO, you would add some CDL in devs/watchdog/arm/lpc2xxx/*/*, e.g.
> CYGOPT_DEVICES_WATCHDOG_ARM_LPC2XXX_RESET_SAFE to wrap that reset,
> well, to add something likes the below
>
>    int old;
>    HAL_DISABLE_INTERRUPTS( old );
>    /* Feed magic values to reset the watchdog. */
>    /* ... */
>    HAL_RESTORE_INTERRUPTS( old );
>
> But, as I could understand, you pointed on eCosCentric build.
>
> HTH
>
> Sergei
>

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Re: [ECOS] LPC2XXX watchdog feeds and interrupts

[Sergei Gavrikov]

On Tue, Oct 27, 2009 at 08:03:55AM +1100, Laurie Gellatly wrote:
> Hi Sergei,
> Two things. It should not be an option as when the feed sequence is
> eventually interrupted and the processor is reset it can be VERY
> time  consuming to track down. I know from bitter experience.  The
> other is I was not sure about which interrupt disable/enable
> function pairs to use. Is HAL_DISABLE_INTERRUPTS preferred over
> cyg_disable_interrupts?  We need ALL interrupts off during the feed.

Or cyg_scheduler_{,un}lock() then, but, that is kernel depended.
Perhaps, you are right, IMO, eCos kernel hackers can say the last
words :-) I just wanted to have an optional fix via CDL.

Sergei

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[ECOS] LPC2XXX watchdog feeds and interrupts

[Laurie Gellatly]

Hi All,
I using an ARM 7 (LPC2212) based on an eCosCentric build. It appears that
watchdog feeds are done with interrupts enabled yet the NXP manual
warns against leaving interrupts enabled during a feed sequence (and I'm
pretty sure I've seen the consequences).
Firstly, have I missed something? Are interrupts disabled and I just don't
see where when I call watchdog_reset() 
OR
should I be adding cyg_interrupt_disable() and cyg_interrupt_enable() calls
around the feed sequence in watchdog_lpc2xxx.cxx

Thanks			...Laurie:{)



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