* Re: [ECOS] Hitachi SH7709 Serial drivers
2000-10-12 7:12 Peter Graf
@ 2000-10-13 0:08 ` Jesper Skov
0 siblings, 0 replies; 3+ messages in thread
From: Jesper Skov @ 2000-10-13 0:08 UTC (permalink / raw)
To: Peter Graf; +Cc: ecos-discuss
>>>>> "Peter" == Peter Graf <pg-itk@t-online.de> writes:
Peter> Hi, just a quick question: Is it likely that the Serial driver
Peter> for the Hitachi SH7709(A) will be changed within the next
Peter> weeks, towards full support for all 3 ports? Thanks for info.
What do you mean? It already does. It's a question of knowing the
right spells and where to get the chicken blood. See the below CDL and
inline files.
Jesper
cdl_package CYGPKG_IO_SERIAL_SH_FOOBAR {
display "SH/FOOBAR serial device drivers"
parent CYGPKG_IO_SERIAL_DEVICES
active_if CYGPKG_IO_SERIAL
active_if CYGPKG_HAL_SH_SH7709A_FOOBAR
requires CYGPKG_ERROR
include_dir cyg/io
description "
This option enables the serial device drivers for the
SH FOOBAR board, based on the generic SH SCIF driver."
doc redirect/ecos-device-drivers.html
# FIXME: This really belongs in the SH_SCI package
cdl_interface CYGINT_IO_SERIAL_SH_SCI_REQUIRED {
display "SH SCI driver required"
}
# FIXME: This really belongs in the SH_SCIF package
cdl_interface CYGINT_IO_SERIAL_SH_SCIF_REQUIRED {
display "SH SCIF driver required"
}
define_proc {
puts $::cdl_system_header "/***** serial driver proc output start *****/"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_SH_SCIF_INL <cyg/io/sh_sh3_foobar_scif.inl>"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_SH_SCIF_CFG <pkgconf/io_serial_sh_foobar.h>"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_SH_SCI_INL <cyg/io/sh_sh3_foobar_sci.inl>"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_SH_SCI_CFG <pkgconf/io_serial_sh_foobar.h>"
puts $::cdl_system_header "/***** serial driver proc output end *****/"
}
# SCI port
cdl_component CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCI {
display "FOOBAR serial, SCI port 0 driver"
flavor bool
default_value 1
description "
This option includes the serial device driver for the SCI
port."
implements CYGINT_IO_SERIAL_SH_SCI_REQUIRED
cdl_option CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_NAME {
display "Device name for SH3 FOOBAR SCI"
flavor data
default_value {"\"/dev/ser0\""}
description "
This option specifies the device name for the SCI port."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BAUD {
display "Baud rate for the SH SCI driver"
flavor data
legal_values { 4800 9600 14400 19200 38400 57600 115200 }
default_value 38400
description "
This option specifies the default baud rate (speed)
for the SCI port."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BUFSIZE {
display "Buffer size for the SH SCI driver"
flavor data
legal_values 0 to 8192
default_value 128
description "
This option specifies the size of the internal buffers
used for the SCI port."
}
}
# SCIF ports
cdl_component CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1 {
display "FOOBAR serial, SCIF port 1 driver"
flavor bool
default_value 1
description "
This option includes the serial device driver for SCIF
port 1 (IRDA in serial mode)."
implements CYGINT_IO_SERIAL_SH_SCIF_REQUIRED
implements CYGINT_IO_SERIAL_FLOW_CONTROL_HW
implements CYGINT_IO_SERIAL_LINE_STATUS_HW
cdl_option CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_NAME {
display "Device name"
flavor data
default_value {"\"/dev/ser1\""}
description "
This option specifies the device name for the serial
port."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BAUD {
display "Baud rate"
flavor data
legal_values { 4800 9600 14400 19200 38400 57600 115200 }
default_value 38400
description "
This option specifies the default baud rate (speed)
for the serial driver."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BUFSIZE {
display "Buffer size"
flavor data
legal_values 0 to 8192
default_value 128
description "
This option specifies the size of the internal buffers
used for the serial driver."
}
cdl_option CYGSEM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_DMA {
display "Enable SCIF serial driver DMA"
active_if CYGINT_HAL_SH_DMA_CHANNELS
implements CYGINT_HAL_SH_DMA_CHANNELS_USED
implements CYGINT_IO_SERIAL_SH_SCIF_DMA
default_value 1
description "
Enable DMA for this port."
}
}
cdl_component CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2 {
display "FOOBAR serial, SCIF port 2 driver"
flavor bool
default_value 1
description "
This option includes the serial device driver for SCIF
port 2."
implements CYGINT_IO_SERIAL_SH_SCIF_REQUIRED
implements CYGINT_IO_SERIAL_FLOW_CONTROL_HW
implements CYGINT_IO_SERIAL_LINE_STATUS_HW
cdl_option CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_NAME {
display "Device name"
flavor data
default_value {"\"/dev/ser2\""}
description "
This option specifies the device name for the serial
port."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BAUD {
display "Baud rate"
flavor data
legal_values { 4800 9600 14400 19200 38400 57600 115200 }
default_value 38400
description "
This option specifies the default baud rate (speed)
for the serial driver."
}
cdl_option CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BUFSIZE {
display "Buffer size"
flavor data
legal_values 0 to 8192
default_value 128
description "
This option specifies the size of the internal buffers
used for the serial driver."
}
cdl_option CYGSEM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_DMA {
display "Enable SCIF serial driver DMA"
active_if CYGINT_HAL_SH_DMA_CHANNELS
implements CYGINT_HAL_SH_DMA_CHANNELS_USED
implements CYGINT_IO_SERIAL_SH_SCIF_DMA
default_value 1
description "
Enable DMA for this port."
}
}
cdl_component CYGPKG_IO_SERIAL_SH_FOOBAR_TESTING {
display "Testing parameters"
flavor bool
calculated 1
no_define
active_if CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1
define_proc {
puts $::cdl_header "#define CYGPRI_SER_TEST_CRASH_ID \"sh-foobar\""
puts $::cdl_header "#define CYGPRI_SER_TEST_SER_DEV CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_NAME"
puts $::cdl_header "#define CYGPRI_SER_TEST_TTY_DEV \"/dev/tty0\""
}
}
}
-------------------------------------------- sci.inl
#include <pkgconf/io_serial_sh_foobar.h>
#ifdef CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCI
static sh_sci_info foobar_serial_info0 =
{
data : 0,
er_int_num : CYGNUM_HAL_INTERRUPT_SCI_ERI,
rx_int_num : CYGNUM_HAL_INTERRUPT_SCI_RXI,
tx_int_num : CYGNUM_HAL_INTERRUPT_SCI_TXI,
ctrl_base : SH_SERIAL_SCI_BASE
};
#if CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BUFSIZE > 0
static unsigned char sh_serial_out_buf[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BUFSIZE];
static unsigned char sh_serial_in_buf[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BUFSIZE];
static SERIAL_CHANNEL_USING_INTERRUPTS(sh_serial_channel,
sh_serial_funs,
foobar_serial_info0,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT,
&sh_serial_out_buf[0],
sizeof(sh_serial_out_buf),
&sh_serial_in_buf[0],
sizeof(sh_serial_in_buf)
);
#else
static SERIAL_CHANNEL(sh_serial_channel,
sh_serial_funs,
foobar_serial_info0,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT
);
#endif
DEVTAB_ENTRY(sh_serial_io0,
CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCI_NAME,
0, // Does not depend on a lower level interface
&cyg_io_serial_devio,
sh_serial_init,
sh_serial_lookup, // Serial driver may need initializing
&sh_serial_channel
);
#endif // CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCI
-------------------------------------------- scif.inl
#include <pkgconf/io_serial_sh_foobar.h>
#ifdef CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1
static sh3_scif_info foobar_serial_info1 =
{
er_int_num : CYGNUM_HAL_INTERRUPT_IRDA_ERI1,
rx_int_num : CYGNUM_HAL_INTERRUPT_IRDA_RXI1,
tx_int_num : CYGNUM_HAL_INTERRUPT_IRDA_TXI1,
ctrl_base : CYGARC_REG_SCSMR1,
#if (CYGINT_IO_SERIAL_SH_SCIF_DMA > 0)
# ifdef CYGSEM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_DMA
dma_enable : true,// we want DMA for this channel
dma_xmt_cr_flags : CYGARC_REG_CHCR_RS_IRDA_TX
# else
dma_enable : false // No DMA
# endif
#endif
};
#if CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BUFSIZE > 0
static unsigned char foobar_serial_out_buf1[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BUFSIZE];
static unsigned char foobar_serial_in_buf1[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BUFSIZE];
static SERIAL_CHANNEL_USING_INTERRUPTS(foobar_serial_channel1,
sh3_scif_funs,
foobar_serial_info1,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT,
&foobar_serial_out_buf1[0],
sizeof(foobar_serial_out_buf1),
&foobar_serial_in_buf1[0],
sizeof(foobar_serial_in_buf1)
);
#else
static SERIAL_CHANNEL(foobar_serial_channel1,
sh3_scif_funs,
foobar_serial_info1,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT
);
#endif
DEVTAB_ENTRY(sh_serial_io1,
CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1_NAME,
0, // Does not depend on a lower level interface
&cyg_io_serial_devio,
sh3_scif_init,
sh3_scif_lookup, // Serial driver may need initializing
&foobar_serial_channel1
);
#endif // CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF1
#ifdef CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2
static sh3_scif_info foobar_serial_info2 = {
er_int_num : CYGNUM_HAL_INTERRUPT_SCIF_ERI2,
rx_int_num : CYGNUM_HAL_INTERRUPT_SCIF_RXI2,
tx_int_num : CYGNUM_HAL_INTERRUPT_SCIF_TXI2,
ctrl_base : CYGARC_REG_SCSMR2,
#if (CYGINT_IO_SERIAL_SH_SCIF_DMA > 0)
# ifdef CYGSEM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_DMA
dma_enable : true,// we want DMA for this channel
dma_xmt_cr_flags : CYGARC_REG_CHCR_RS_SCIF_TX
# else
dma_enable : false // No DMA
# endif
#endif
};
#if CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BUFSIZE > 0
static unsigned char foobar_serial_out_buf2[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BUFSIZE];
static unsigned char foobar_serial_in_buf2[CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BUFSIZE];
static SERIAL_CHANNEL_USING_INTERRUPTS(foobar_serial_channel2,
sh3_scif_funs,
foobar_serial_info2,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT,
&foobar_serial_out_buf2[0],
sizeof(foobar_serial_out_buf2),
&foobar_serial_in_buf2[0],
sizeof(foobar_serial_in_buf2)
);
#else
static SERIAL_CHANNEL(foobar_serial_channel2,
sh3_scif_funs,
foobar_serial_info2,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT
);
#endif
DEVTAB_ENTRY(sh_serial_io2,
CYGDAT_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2_NAME,
0, // Does not depend on a lower level interface
&cyg_io_serial_devio,
sh3_scif_init,
sh3_scif_lookup, // Serial driver may need initializing
&foobar_serial_channel2
);
#endif // CYGPKG_IO_SERIAL_SH_FOOBAR_SERIAL_SCIF2
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