[ECOS] Memory mapping Question on NECvrc4373

[ECOS] Memory mapping Question on NECvrc4373

[Ling Su]

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Hello, 
 
Sorry for dropping a lot of message on this list today. I am busy with 
finding this problem. Jifl, I guess you might could pick up this question, of 
course, if you have time :-). Thanks!
 
I found on the DDB-NECvrc4373 board manual, the physical address of PCI 
slots if from 0x0C000000, and the Virtual address for the PROM is mapped to 
0xAC000000. In the eCos HAL layer "plf_io.h" for VRC4373, the 
HAL_PCI_PHYSICAL_MEMORY_BASE is 0xC000000, which is different from the 
0x0C000000 phyiscal address on the manual. The comment for the 
HAL_PCI_PHYSICAL_MEMORY_BASE is "where the PCI spaces are mapped in the CPU's 
(virtual) address space", I don't quiet understand this differnece and the 
comment actually. According to my understanding the 
HAL_PCI_PHYSICAL_MEMORY_BASE should be the phyiscal address space on board, is 
that correct?
 
I do have trouble to find a method to access the PCI mapped memory, anyone 
could shed me some light, I appreciate very much!
 
Best Regards,
-Ling
 
 
 
 

Re: [ECOS] Memory mapping Question on NECvrc4373

[Jonathan Larmour]

> Ling Su wrote:
> 
> I found on the DDB-NECvrc4373 board manual, the physical address of PCI
> slots if from 0x0C000000, and the Virtual address for the PROM is mapped
> to 0xAC000000. In the eCos HAL layer "plf_io.h" for VRC4373, the
> HAL_PCI_PHYSICAL_MEMORY_BASE is 0xC000000, which is different from the
> 0x0C000000 phyiscal address on the manual.

(I assume you meant to say that HAL_PCI_PHYSICAL_MEMORY_BASE is
0xC0000000.)

I don't really know on what basis the board manual says that - perhaps it
is specific to pmon and pmon differs here? The thing is that the way PCI
works (someone correct me if I'm wrong here) is that memory/IO regions on
cards have to be mapped into the CPU address space at a certain address.
The important issue is that the address is of the CPU's choosing. When the
CPU chooses the address, it tells the PCI controller what address the
device was assigned. From then on, that is the device's address.

> The comment for the
> HAL_PCI_PHYSICAL_MEMORY_BASE is "where the PCI spaces are mapped in the
> CPU's (virtual) address space", I don't quiet understand this differnece
> and the comment actually. According to my understanding the
> HAL_PCI_PHYSICAL_MEMORY_BASE should be the phyiscal address space on
> board, is that correct?

There is no address space on the board really - or at least that doesn't
matter. All that matters is that the PCI card said it had e.g. 64Kb of
memory. The PCI library code then maps this into memory starting at
0xC0000000. The next card would be mapped into memory starting at
0xC0000000+64Kb, for example.

The other thing to say is that the physical address space is just mapped 1
for 1 in the virtual address space. There are no MMU tricks to move it
around - so when you write to the virtual address of 0xC0000000, that's
what should be what comes out the processor address bus.

Nick, any comments on the above?

Jifl
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