From: Gary Thomas <gary@mlbassoc.com>
To: Andrey Baboshin <ababoshin@tepkom.ru>
Cc: ecos-discuss@ecos.sourceware.org
Subject: Re: [ECOS] Init sequence for enabling MMU at mpc5xx fails
Date: Tue, 22 Jul 2008 15:46:00 -0000 [thread overview]
Message-ID: <488600B6.1070707@mlbassoc.com> (raw)
In-Reply-To: <1e6f0d0fa4bbc3ce68b71ffd13453d2c@tepkom.ru>
Andrey Baboshin wrote:
> Hi, all.
>
> I find following problem.
> I enable the MMU in eCos and it executes next code
>
> # Initialize MMU.
> bl hal_MMU_init
>
> # Enable MMU (if desired) so we can safely enable caches.
> lwi r3,CYG_MSR # interrupts enabled later
> sync
> mtmsr r3 (*)
> sync
>
> # Enable caches
> bl hal_enable_caches
>
> I have found it fails after (*).
> In additional
> CYG_MSR = (CYG_MSR_COMMON | IP_BIT | IR_DR_BITS)
> CYG_MSR_COMMON = (MSR_FP | MSR_ME | MSR_RI)
> IP_BIT = 0
> IR_DR_BITS = (MSR_IR | MSR_DR)
>
> Do have anyone some problem?
> It works only when I comment mtmsr r3 and followed by it sync.
Which only means that it works with the MMU turned off :-(
How did you setup the MMU?
What target/platform are you working with?
--
------------------------------------------------------------
Gary Thomas | Consulting for the
MLB Associates | Embedded world
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prev parent reply other threads:[~2008-07-22 15:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-07-22 15:29 Andrey Baboshin
2008-07-22 15:34 ` Andrey Baboshin
2008-07-22 15:46 ` Gary Thomas [this message]
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