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* [ECOS] Interrupt stack on ARM arch.
@ 2009-02-15 20:57 Martin Laabs
  2009-03-02 11:43 ` Jürgen Lambrecht
  0 siblings, 1 reply; 2+ messages in thread
From: Martin Laabs @ 2009-02-15 20:57 UTC (permalink / raw)
  To: ecos-discuss

Hi,

I've been looking in vectors.S in ecos/packages/hal/arm because I
get a trap when disableing the CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
option.
There you find the following:


IRQ:                                                                            
        // Note: I use this exception stack while saving the context because
        // the current SP does not seem to be always valid in this CPU mode.
        ldr     sp,.__exception_stack   // get good stack
        stmfd   sp!,{r0-r5}             // save some supervisor regs
        sub     r0,lr,#4                // PC at time of interrupt
        mrs     r1,spsr
        mov     r2,#CYGNUM_HAL_VECTOR_IRQ
        mov     r3,sp
[...]

Does this mean, that every interrupt will use the (much to small) 
exception stack if no dedicated interrupt stack is defined?

Thank you,
 Martin L.

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [ECOS] Interrupt stack on ARM arch.
  2009-02-15 20:57 [ECOS] Interrupt stack on ARM arch Martin Laabs
@ 2009-03-02 11:43 ` Jürgen Lambrecht
  0 siblings, 0 replies; 2+ messages in thread
From: Jürgen Lambrecht @ 2009-03-02 11:43 UTC (permalink / raw)
  To: Martin Laabs; +Cc: ecos-discuss

Hello Martin,

I also just read your previous mail on ecos-devel.
Each 12us an IRQ is indeed fast!
Using the FIQ is a good idea, but you should then not use eCos (in 
vectors.S). Just write all FIQ handling code yourself in assembly then. 
I have had problems with the ARM FIQ 
(http://sourceware.org/ml/ecos-discuss/2007-09/msg00099.html).
Also search the mailing list for "FIQ", there are some interesting mails.

Martin Laabs wrote:
> Hi,
>
> I've been looking in vectors.S in ecos/packages/hal/arm because I
> get a trap when disableing the CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
> option.
> There you find the following:
>
>
> IRQ:
>         // Note: I use this exception stack while saving the context because
>         // the current SP does not seem to be always valid in this CPU mode.
>         ldr     sp,.__exception_stack   // get good stack
>         stmfd   sp!,{r0-r5}             // save some supervisor regs
>         sub     r0,lr,#4                // PC at time of interrupt
>         mrs     r1,spsr
>         mov     r2,#CYGNUM_HAL_VECTOR_IRQ
>         mov     r3,sp
> [...]
>
> Does this mean, that every interrupt will use the (much to small)
> exception stack if no dedicated interrupt stack is defined?
>   
Then every interrupt will use 1 stack, and the size is determined by 
CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE.

Kind regards,
Jürgen
> Thank you,
>  Martin L.
>
> --
> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>
>
>   



-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2009-02-15 20:57 [ECOS] Interrupt stack on ARM arch Martin Laabs
2009-03-02 11:43 ` Jürgen Lambrecht

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