[ECOS] Atmel DataFlash commands?

[ECOS] Atmel DataFlash commands?

[Stanislav Meduna]

Hi,

I am trying to interface with the Atmel DataFlash AT45DB642D
(http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf)
in the serial mode over the SPI. The current
devs_flash_atmel_dataflash.c states

// Read commands opcodes
#define DF_CONT_ARRAY_READ_CMD              0x68
#define DF_MMEM_PAGE_READ_CMD               0x52
#define DF_BUF1_READ_CMD                    0x54
#define DF_BUF2_READ_CMD                    0x56
#define DF_STATUS_READ_CMD                  0x57


However, these are _not_ what the datasheet of the part
defines and e.g. the DF_CONT_ARRAY_READ_CMD actually
returns wrong data (the bytes returned seem to be shifted
1 bit to the right)

According to the datasheet (and another working source I have
access to) the correct commands in the serial mode are:

#define DF_CONT_ARRAY_READ_CMD              0xe8
#define DF_MMEM_PAGE_READ_CMD               0xd2
#define DF_BUF1_READ_CMD                    0xd4
#define DF_BUF2_READ_CMD                    0xd6
#define DF_STATUS_READ_CMD                  0xd7

This DF_CONT_ARRAY_READ_CMD works.


I have no access to other hardware using this or any other
DataFlash, so I am not sure whether these defines actually
work on other hardware.

It looks like I am not the only one encountering it - a similar
problem is discussed e.g. at

http://sourceware.org/ml/ecos-discuss/2007-10/msg00119.html

However, the original commands are not mentioned in the
AT45DB642D datasheet _at_all_, so the Andrew Lunn's advice
to use another SPI mode probably does not apply.

A http://simplecircuitdesign.com/html/dataflash_8h-source.html
has an interesting comment:

#define ContArrayRead 0x68 // Continuous Array Read (Note : Only A/B-parts supported)

so maybe this is the clue - this is a "D" part.

In the case it matters the hardware is an ERTEC 200 based
board. I am writing the SPI driver myself - I can't
guarantee it works 100%, but the other commands seem
to work.

Right now I just re-#defined the constants if my platform is being
used; however, this should probably be caught generically.


Regards
-- 
                                     Stano

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[ECOS] Re: Atmel DataFlash commands?

[John Dallaway]

Hi Stano

Stanislav Meduna wrote:

> I am trying to interface with the Atmel DataFlash AT45DB642D
> (http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf)
> in the serial mode over the SPI. The current
> devs_flash_atmel_dataflash.c states
> 
> // Read commands opcodes
> #define DF_CONT_ARRAY_READ_CMD              0x68
> #define DF_MMEM_PAGE_READ_CMD               0x52
> #define DF_BUF1_READ_CMD                    0x54
> #define DF_BUF2_READ_CMD                    0x56
> #define DF_STATUS_READ_CMD                  0x57
> 
> However, these are _not_ what the datasheet of the part
> defines and e.g. the DF_CONT_ARRAY_READ_CMD actually
> returns wrong data (the bytes returned seem to be shifted
> 1 bit to the right)
> 
> According to the datasheet (and another working source I have
> access to) the correct commands in the serial mode are:
> 
> #define DF_CONT_ARRAY_READ_CMD              0xe8
> #define DF_MMEM_PAGE_READ_CMD               0xd2
> #define DF_BUF1_READ_CMD                    0xd4
> #define DF_BUF2_READ_CMD                    0xd6
> #define DF_STATUS_READ_CMD                  0xd7
> 
> This DF_CONT_ARRAY_READ_CMD works.
> 
> I have no access to other hardware using this or any other
> DataFlash, so I am not sure whether these defines actually
> work on other hardware.

Here's the datasheet for older revisions of the same part:

  http://www.datasheetcatalog.org/datasheet/atmel/DOC1638.PDF

It looks like the existing read command opcodes in the DataFlash driver
refer to an older SCK/CLK mode which is not supported in newer devices.
Can you determine whether we need to continue to support the old SCK/CLK
mode from the timing diagrams?

John Dallaway

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Re: [ECOS] Re: Atmel DataFlash commands?

[Stanislav Meduna]

John Dallaway wrote:

> It looks like the existing read command opcodes in the DataFlash driver
> refer to an older SCK/CLK mode which is not supported in newer devices.
> Can you determine whether we need to continue to support the old SCK/CLK
> mode from the timing diagrams?

Hmm.. the older Inactive Clock Polarity Low mode actually differs from
SPI Mode 0 exactly in the way I have observed - the first data bit
is put to the SO after 64th falling clock edge in the SPI mode
and after 65th edge in the older one.

So the answer depends on 1) whether someone uses a hardware
that only does the older mode and cannot do SPI 0/3 and
2) how to do the transition so that working code out there
does not break in a quite unpleasant way.

I'd guess we'll need a configuration option for the mode here...

Regards
-- 
                                   Stano

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Re: [ECOS] Re: Atmel DataFlash commands?

[John Dallaway]

Hi Stano

Stanislav Meduna wrote:

> John Dallaway wrote:
> 
>> It looks like the existing read command opcodes in the DataFlash driver
>> refer to an older SCK/CLK mode which is not supported in newer devices.
>> Can you determine whether we need to continue to support the old SCK/CLK
>> mode from the timing diagrams?
> 
> Hmm.. the older Inactive Clock Polarity Low mode actually differs from
> SPI Mode 0 exactly in the way I have observed - the first data bit
> is put to the SO after 64th falling clock edge in the SPI mode
> and after 65th edge in the older one.
> 
> So the answer depends on 1) whether someone uses a hardware
> that only does the older mode and cannot do SPI 0/3 and
> 2) how to do the transition so that working code out there
> does not break in a quite unpleasant way.

The only contributed board support which uses this driver is for the
Atmel AT91EB55 evaluation board which uses an AT45DB321 DataFlash part.
The original version of this part did not support the newer "SPI Mode
0/3" commands:

  http://www.atmel.com/dyn/resources/prod_documents/DOC1121.PDF

> I'd guess we'll need a configuration option for the mode here...

Yes. It seems best to add a CYGOPT_DEVS_FLASH_ATMEL_DATAFLASH_ICP_READ
option which is disabled by default and must be enabled to select the
older "Inactive Clock Polarity High/Low" read commands. We can tweak the
AT91EB55 HAL to require that this option is enabled.

John Dallaway

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