From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12712 invoked by alias); 31 May 2011 13:41:26 -0000 Received: (qmail 12703 invoked by uid 22791); 31 May 2011 13:41:25 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from tirion.supremecenter202.com (HELO tirion.supremecenter202.com) (209.25.195.243) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 31 May 2011 13:40:47 +0000 Received: from [89.185.213.209] (port=44735 helo=[192.168.2.99]) by tirion.supremecenter202.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1QRPBf-0007wo-15 for ecos-discuss@ecos.sourceware.org; Tue, 31 May 2011 13:40:47 +0000 Message-ID: <4DE4EFDB.5070704@siva.com.mk> Date: Tue, 31 May 2011 15:04:00 -0000 From: Ilija Stanislevik User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: ecos-discuss@ecos.sourceware.org References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Subject: Re: [ECOS] SPI chip select for cortexm X-SW-Source: 2011-05/txt/msg00072.txt.bz2 On 05/31/2011 11:45 AM, jayant biswas wrote: > Hello! > > I am using a STM3210E eval board > (http://www.st.com/stonline/books/pdf/docs/14220.pdf) and have > successfully configured ecos to use the SPI interface. I can run the > loopback test, which confirms its functionality. I would like to use > the SPI interface (connected to the SPI flash on the board) to > communicate with a programmable potentiometer (AD8400) that I have > mounted on the QST connector of the evaluation board. I have chosen > the pin PA8 for CSn. How can I make the SPI driver in ecos to use this > pin as the chip select? > > Thank you in advance for your help. > > Jayant > Set CYGHWR_DEVS_SPI_CORTEXM_STM32_BUS1_CS_GPIOS to 8 if you are using SPI1. For SPI2 or SPI3 set CYGHWR_DEVS_SPI_CORTEXM_STM32_BUS2_CS_GPIOS or CYGHWR_DEVS_SPI_CORTEXM_STM32_BUS3_CS_GPIOS accordingly. Regards, -- Ilija Stanislevik SIvA doo ul. Mladinska 43 lok. 6 p.f. 53 MK-2400 Strumica Macedonia www.siva.mk -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss