[ECOS] STM32F4 Discovery + LwIP

[ECOS] STM32F4 Discovery + LwIP

[Valentin BOUSSON]

Hello all,

I put aside the dynamic object loading for a while. I will come back to 
it when i'm more experienced.



Today, I have a problem to set up *LwIP* on my *STM32F4DISCOVERY* with 
the standard extension board.
(http://www.st.com/web/catalog/tools/FM146/CL1984/SC720/SS1462/PF255417)


I tried a lot of thing, as using the default configuration for eCos, 
adding packages "Ethernet common drivers" and "LwIP stack". No confilct 
appears, but an the stack doesn't seem to work at all.
I tried to use LwIP in another context, embedded in FreeRTOS, in a piece 
of code provided by ST, same results.
An idea I have concerning my problem is that I don't have a good 
Ethernet BSP.


The goal  I would like to reach for now, is just an ARP packet 
broadcast. Then, I will try to acheive more interesting protocols.
Do some of you have ever tried to use it on STM32F4Discovery + EXT, or 
have some documentation that could help me understand interfaces between 
(STM32f4 & LwIP) or (LwIP & eCos) or anything else. :=)


Thank you.

Valentin BOUSSON

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[ECOS] Re: STM32F4 Discovery + LwIP

[John Dallaway]

Hi Valentin

On 25/03/14 08:26, Valentin BOUSSON wrote:

> Today, I have a problem to set up *LwIP* on my *STM32F4DISCOVERY* with
> the standard extension board.
> (http://www.st.com/web/catalog/tools/FM146/CL1984/SC720/SS1462/PF255417)
> 
> I tried a lot of thing, as using the default configuration for eCos,
> adding packages "Ethernet common drivers" and "LwIP stack". No confilct
> appears, but an the stack doesn't seem to work at all.

At minimum, you will need to add the CYGPKG_DEVS_ETH_PHY and
CYGPKG_DEVS_ETH_CORTEXM_STM32 hardware packages to the
"stm32f4discovery" target description record in packages/ecos.db.
Actually, it would be preferable to create a new target description
record for STM32F4-Discovery with STM32F4DIS-EXT.

You might also be necessary to modify the the hal_system_init() function
in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
Compare with the hal_system_init() function from the STM32x0G platform HAL.

With these changes in place, you should be able to create a new eCos
configuration for lwIP based on the eCos "lwip_eth" packages template.

I hope this helps...

John Dallaway
eCos maintainer
http://www.dallaway.org.uk/john

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Re: [ECOS] Re: STM32F4 Discovery + LwIP

[Jerzy Dyrda]

[-- Attachment #1: Type: text/plain, Size: 6756 bytes --]

Hello Valentin,


On Tuesday 25 of March 2014 10:04:07 John Dallaway wrote:

> On 25/03/14 08:26, Valentin BOUSSON wrote:

>

> > Today, I have a problem to set up *LwIP* on my *STM32F4DISCOVERY* with

> > the standard extension board.

> > (http://www.st.com/web/catalog/tools/FM146/CL1984/SC720/SS1462/PF255417)

> >

> > I tried a lot of thing, as using the default configuration for eCos,

> > adding packages "Ethernet common drivers" and "LwIP stack". No confilct

> > appears, but an the stack doesn't seem to work at all.

>

> At minimum, you will need to add the CYGPKG_DEVS_ETH_PHY and

> CYGPKG_DEVS_ETH_CORTEXM_STM32 hardware packages to the

> "stm32f4discovery" target description record in packages/ecos.db.

> Actually, it would be preferable to create a new target description

> record for STM32F4-Discovery with STM32F4DIS-EXT.

>

> You might also be necessary to modify the the hal_system_init() function

> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.

> Compare with the hal_system_init() function from the STM32x0G platform HAL.

>

> With these changes in place, you should be able to create a new eCos

> configuration for lwIP based on the eCos "lwip_eth" packages template.


And you have to add some pins configuration due to fact that
STM32F4DISCOVERY board

doesn't any network interface.


In packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h
please add such lines:


//=============================================================================

// Custom Ethernet pin mappings


#define CYGHWR_HAL_STM32_ETH_MII_TX_EN CYGHWR_HAL_STM32_PIN_ALTFN_OUT(
B, 11, 11, PUSHPULL, NONE, AT_LEAST(50) )

#define CYGHWR_HAL_STM32_ETH_MII_TXD0 CYGHWR_HAL_STM32_PIN_ALTFN_OUT(
B, 12, 11, PUSHPULL, NONE, AT_LEAST(50) )

#define CYGHWR_HAL_STM32_ETH_MII_TXD1 CYGHWR_HAL_STM32_PIN_ALTFN_OUT(
B, 13, 11, PUSHPULL, NONE, AT_LEAST(50) )


In packages/devs/eth/phy/current/cdl/phy_eth_drivers.cdl add missing PHY chip:


cdl_option CYGHWR_DEVS_ETH_PHY_LAN8720A {

display "SMSC LAN8720A"

flavor bool

default_value 0

compile -library=libextras.a LAN8720A.c

description "

Include support for SMSC LAN8720A"

}


and finally add new PHY i.e LAN8720A.c into directory ->
packages/devs/eth/phy/current/src


if you will have additional problems please ask I have already brought
up network interface on

STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
board from Embest, now

as I see it's called STM32F4DIS-BB).



Best regards,

jerzy

2014-03-25 13:30 GMT+01:00 Jerzy Dyrda <jerzdy@gmail.com>:
> Hello Valentin,
>
>
> On Tuesday 25 of March 2014 10:04:07 John Dallaway wrote:
>
>> On 25/03/14 08:26, Valentin BOUSSON wrote:
>
>>
>
>> > Today, I have a problem to set up *LwIP* on my *STM32F4DISCOVERY* with
>
>> > the standard extension board.
>
>> > (http://www.st.com/web/catalog/tools/FM146/CL1984/SC720/SS1462/PF255417)
>
>> >
>
>> > I tried a lot of thing, as using the default configuration for eCos,
>
>> > adding packages "Ethernet common drivers" and "LwIP stack". No confilct
>
>> > appears, but an the stack doesn't seem to work at all.
>
>>
>
>> At minimum, you will need to add the CYGPKG_DEVS_ETH_PHY and
>
>> CYGPKG_DEVS_ETH_CORTEXM_STM32 hardware packages to the
>
>> "stm32f4discovery" target description record in packages/ecos.db.
>
>> Actually, it would be preferable to create a new target description
>
>> record for STM32F4-Discovery with STM32F4DIS-EXT.
>
>>
>
>> You might also be necessary to modify the the hal_system_init() function
>
>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>
>> Compare with the hal_system_init() function from the STM32x0G platform
>> HAL.
>
>>
>
>> With these changes in place, you should be able to create a new eCos
>
>> configuration for lwIP based on the eCos "lwip_eth" packages template.
>
>
> And you have to add some pins configuration due to fact that
> STM32F4DISCOVERY board
>
> doesn't any network interface.
>
>
> In packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h
> please add such lines:
>
>
> //=============================================================================
>
> // Custom Ethernet pin mappings
>
>
> #define CYGHWR_HAL_STM32_ETH_MII_TX_EN CYGHWR_HAL_STM32_PIN_ALTFN_OUT( B,
> 11, 11, PUSHPULL, NONE, AT_LEAST(50) )
>
> #define CYGHWR_HAL_STM32_ETH_MII_TXD0 CYGHWR_HAL_STM32_PIN_ALTFN_OUT( B, 12,
> 11, PUSHPULL, NONE, AT_LEAST(50) )
>
> #define CYGHWR_HAL_STM32_ETH_MII_TXD1 CYGHWR_HAL_STM32_PIN_ALTFN_OUT( B, 13,
> 11, PUSHPULL, NONE, AT_LEAST(50) )
>
>
> In packages/devs/eth/phy/current/cdl/phy_eth_drivers.cdl add missing PHY
> chip:
>
>
> cdl_option CYGHWR_DEVS_ETH_PHY_LAN8720A {
>
> display "SMSC LAN8720A"
>
> flavor bool
>
> default_value 0
>
> compile -library=libextras.a LAN8720A.c
>
> description "
>
> Include support for SMSC LAN8720A"
>
> }
>
>
> and finally add new PHY i.e LAN8720A.c into directory ->
> packages/devs/eth/phy/current/src
>
>
> if you will have additional problems please ask I have already brought up
> network interface on
>
> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base board from
> Embest, now
>
> as I see it's called STM32F4DIS-BB).
>
>
>
> Best regards,
>
> jerzy
>
>
>
> 2014-03-25 11:04 GMT+01:00 John Dallaway <john@dallaway.org.uk>:
>
>> Hi Valentin
>>
>> On 25/03/14 08:26, Valentin BOUSSON wrote:
>>
>> > Today, I have a problem to set up *LwIP* on my *STM32F4DISCOVERY* with
>> > the standard extension board.
>> > (http://www.st.com/web/catalog/tools/FM146/CL1984/SC720/SS1462/PF255417)
>> >
>> > I tried a lot of thing, as using the default configuration for eCos,
>> > adding packages "Ethernet common drivers" and "LwIP stack". No confilct
>> > appears, but an the stack doesn't seem to work at all.
>>
>> At minimum, you will need to add the CYGPKG_DEVS_ETH_PHY and
>> CYGPKG_DEVS_ETH_CORTEXM_STM32 hardware packages to the
>> "stm32f4discovery" target description record in packages/ecos.db.
>> Actually, it would be preferable to create a new target description
>> record for STM32F4-Discovery with STM32F4DIS-EXT.
>>
>> You might also be necessary to modify the the hal_system_init() function
>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>> Compare with the hal_system_init() function from the STM32x0G platform
>> HAL.
>>
>> With these changes in place, you should be able to create a new eCos
>> configuration for lwIP based on the eCos "lwip_eth" packages template.
>>
>> I hope this helps...
>>
>> John Dallaway
>> eCos maintainer
>> http://www.dallaway.org.uk/john
>>
>> --
>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
>> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>>
>

[-- Attachment #2: LAN8720A.c --]
[-- Type: text/x-csrc, Size: 4272 bytes --]

//==========================================================================
//
//      dev/LAN8270A.c
//
//      Ethernet transciever (PHY) support 
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 2003 Gary Thomas
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    jerzdy
// Contributors:
// Date:         2013-11-18
// Purpose:
// Description:  Support for ethernet SMSC LAN8720A
//
//
//####DESCRIPTIONEND####
//
//==========================================================================

#include <pkgconf/system.h>
#include <cyg/infra/cyg_type.h>
#include <cyg/infra/diag.h>

#include <cyg/hal/hal_arch.h>
#include <cyg/hal/drv_api.h>
#include <cyg/hal/hal_if.h>
#include <cyg/hal/hal_tables.h>

#include <cyg/io/eth_phy.h>
#include <cyg/io/eth_phy_dev.h>

static bool lan8720a_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state=0;
    int tries=0;

    // Read negotiated state
    if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) {
        if ((phy_state & PHY_BMSR_AUTO_NEG) == 0) {
            eth_phy_printf("... waiting for auto-negotiation (30 x 0,2sec):");
            for (tries = 0;  tries < 30;  tries++) {
                if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) {
                    if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(200000);   // 0.2 second
                diag_printf(".");
            }
            eth_phy_printf("\n");
        }

        if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
            *state = 0;
            if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) {
                if ((phy_state & PHY_BMSR_LINK) != 0) *state |= ETH_PHY_STAT_LINK;
            }
            if (_eth_phy_read(f, 0x5, f->phy_addr, &phy_state)) {
                // Partner negotiated parameters
                if ((phy_state & 0x0100) != 0) *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX;
                if ((phy_state & 0x0080) != 0) *state |= ETH_PHY_STAT_100MB;
#ifdef ETH_PHY_STAT_10MB
                if ((phy_state & 0x0040) != 0) *state |= ETH_PHY_STAT_10MB | ETH_PHY_STAT_FDX;
                if ((phy_state & 0x0020) != 0) *state |= ETH_PHY_STAT_10MB;
#endif
                // _eth_phy_read(f, 17, f->phy_addr, &phy_state);
                // CYGACC_CALL_IF_DELAY_US(1000000);   // 0.1 second
                return true;
            }
        }
    }
    return false;
}


_eth_phy_dev("SMCS LAN8720A", 0x0007C0F1, lan8720a_stat)

[-- Attachment #3: Type: text/plain, Size: 148 bytes --]

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[ECOS] Re: STM32F4 Discovery + LwIP

[John Dallaway]

Hi Jerzy and Valentin

On 25/03/14 12:34, Jerzy Dyrda wrote:

> ... I have already brought up network interface on
> 
> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
> board from Embest, now as I see it's called STM32F4DIS-BB).

Great! Maybe we can work together to get ethernet support for this
platform added to the eCos repository. I think it would be preferable to
define a new target such as "stm32f4discovery_bb" in ecos.db which
includes the STM32 ethernet package. We can then make the necessary
changes within the platform HAL source code conditional on
CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
of the STM32F4-Discovery board may wish to wire up a different PHY
component rather than using STM32F4DIS-BB.

John Dallaway
eCos maintainer
http://www.dallaway.org.uk/john

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[ECOS] Re: STM32F4 Discovery + LwIP

[Jerzy Dyrda]

Hello John,

On Tuesday 25 of March 2014 15:25:33 John Dallaway wrote:
> On 25/03/14 12:34, Jerzy Dyrda wrote:
>
> > ... I have already brought up network interface on
> >
> > STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
> > board from Embest, now as I see it's called STM32F4DIS-BB).
>
> Great! Maybe we can work together to get ethernet support for this
> platform added to the eCos repository.
Of course. It's vital to add new stuff in order eCos can be still "useable".

> I think it would be preferable to define a new target such as "stm32f4discovery_bb" in ecos.db which
> includes the STM32 ethernet package. We can then make the necessary
> changes within the platform HAL source code conditional on
> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
> of the STM32F4-Discovery board may wish to wire up a different PHY
> component rather than using STM32F4DIS-BB.
OK.

Best regards,
jerzy

2014-03-25 16:25 GMT+01:00 John Dallaway <john@dallaway.org.uk>:
> Hi Jerzy and Valentin
>
> On 25/03/14 12:34, Jerzy Dyrda wrote:
>
>> ... I have already brought up network interface on
>>
>> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
>> board from Embest, now as I see it's called STM32F4DIS-BB).
>
> Great! Maybe we can work together to get ethernet support for this
> platform added to the eCos repository. I think it would be preferable to
> define a new target such as "stm32f4discovery_bb" in ecos.db which
> includes the STM32 ethernet package. We can then make the necessary
> changes within the platform HAL source code conditional on
> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
> of the STM32F4-Discovery board may wish to wire up a different PHY
> component rather than using STM32F4DIS-BB.
>
> John Dallaway
> eCos maintainer
> http://www.dallaway.org.uk/john

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Re: [ECOS] Re: STM32F4 Discovery + LwIP

[Valentin BOUSSON]

Hi John and Jerzy.
Sorry for being AFK so long,
I heard all the advice you gave me, and I will finally be able to try it 
all during this week.

I will let you know on how I advance. Thanks for your work and you 
implication.

:)
Best regards,

Valentin BOUSSON

On 25/03/2014 19:32, Jerzy Dyrda wrote:
> Hello John,
>
> On Tuesday 25 of March 2014 15:25:33 John Dallaway wrote:
>> On 25/03/14 12:34, Jerzy Dyrda wrote:
>>
>>> ... I have already brought up network interface on
>>>
>>> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
>>> board from Embest, now as I see it's called STM32F4DIS-BB).
>> Great! Maybe we can work together to get ethernet support for this
>> platform added to the eCos repository.
> Of course. It's vital to add new stuff in order eCos can be still "useable".
>
>> I think it would be preferable to define a new target such as "stm32f4discovery_bb" in ecos.db which
>> includes the STM32 ethernet package. We can then make the necessary
>> changes within the platform HAL source code conditional on
>> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
>> of the STM32F4-Discovery board may wish to wire up a different PHY
>> component rather than using STM32F4DIS-BB.
> OK.
>
> Best regards,
> jerzy
>
> 2014-03-25 16:25 GMT+01:00 John Dallaway <john@dallaway.org.uk>:
>> Hi Jerzy and Valentin
>>
>> On 25/03/14 12:34, Jerzy Dyrda wrote:
>>
>>> ... I have already brought up network interface on
>>>
>>> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
>>> board from Embest, now as I see it's called STM32F4DIS-BB).
>> Great! Maybe we can work together to get ethernet support for this
>> platform added to the eCos repository. I think it would be preferable to
>> define a new target such as "stm32f4discovery_bb" in ecos.db which
>> includes the STM32 ethernet package. We can then make the necessary
>> changes within the platform HAL source code conditional on
>> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
>> of the STM32F4-Discovery board may wish to wire up a different PHY
>> component rather than using STM32F4DIS-BB.
>>
>> John Dallaway
>> eCos maintainer
>> http://www.dallaway.org.uk/john


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[ECOS] Re: STM32F4 Discovery + LwIP

[Valentin BOUSSON]

Thanks for your help, but I have already tried this configuration,
then my problem may come from the way I use lwip stack.

I thought than once the program start, with nothing more than an empty 
main and the init phase of eCos, I would have all the necessary threads 
running for ARP or ping response (at least).

If you confirm me this behaviour, that's I'm missing something in my 
eCos config. Did you add anything in the initialisation phase ?

thanks.

Valentin BOUSSON



On 10/04/2014 13:53, Jerzy Dyrda wrote:
> Hello Valentin,
>
>
> On Thursday 10 of April 2014 11:37:53 you wrote:
>
>
>> I took into account all the modifications you make me do onto my ecos
>> build, and so I did :
>> - in my ecos.db, I added :
>> /
>> /
>> /target stm32f4discovery-bbext {/
>> / alias { "STMicroelectronics STM32F4-Discovery board with
>> DM-STF4BB extension board" }/
>> / packages {/
>> / CYGPKG_HAL_CORTEXM/
>> / CYGPKG_HAL_CORTEXM_STM32/
>> / CYGPKG_HAL_CORTEXM_STM32_STM32F4DISCOVERY/
>> / CYGPKG_IO_FLASH/
>> / CYGPKG_DEVS_FLASH_STM32/
>> / CYGPKG_IO_SERIAL_CORTEXM_STM32/
>> / CYGPKG_IO_ETH_DRIVERS/
>> / CYGPKG_DEVS_ETH_PHY/
>> / CYGPKG_DEVS_ETH_CORTEXM_STM32/
>> / }/
>> / description "The stm32f4discovery--bbext target provides the
>> packages needed/
>> / to run eCos on the STMicroelectronics STM32F4-Discovery board
>> with the DM-STF4BB (STM32F4DIS-EXT)."/
>> /}
>> /
> Genau.
>
>
>> /
>> /- in my current folder, I was able to generate a configuration with
>> this template, and I added the package concerning LWIP. My configuration
>> is linked to the mail.
>>
>> - I addedin
>> packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h the
>> pins configurationJerzy gave me, and the custom driver.
> Genau.
>
>
>> If I understand
>> well, The type of PHY interface is MII, and we have to check the "MII
>> pins remapped".
> Nope. PHY interface type is RMII. So it has to be set RMII interface
> in ecc file:
>
>
> # Type of interface used to connect with PHY : MII or RMII
> #
> cdl_option CYGSEM_DEVS_ETH_CORTEXM_STM32_INTF {
> # Flavor: data
> user_value RMII
>
> # value_source user
> # Default value: RMII
> # Legal values: "MII" "RMII"
> };
>
> but please use graphical eCos Configuration Tool to fix it.
>
>> - Concerning the system initialization :
>> ""
>> John said :
>>
>> You might also be necessary to modify the the hal_system_init() function
>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>> Compare with the hal_system_init() function from the STM32x0G platform HAL.
>>
>> ""
>> Concerning this modification, I must admit I'm very new to such embedded
>> platform/systems (as you may have already noticed ;) ), and I don't
>> understand how I am supposed to adapt it. All those pin configuration,
>> clocks linking, etc.. are really obscure to me (for now).
>> Jerzy, how did you do ?
>> The only bunch of code that seems to be useful is concerning the PHY
>> should look like :
>>
>> #if defined(CYGHWR_HAL_CORTEXM_STM32_PHY_CLOCK_MCO)
>> // Use HSE clock as the MCO1 clock signals for PHY
>> {
>> cyg_uint32 acr;
>>
>> HAL_READ_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>> acr |= CYGHWR_HAL_STM32_RCC_CFGR_MCO1_HSE |
>> CYGHWR_HAL_STM32_RCC_CFGR_MCO1PRE_1;
>> HAL_WRITE_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>> }
>> #endif
>>
>> , right ? (I'm no Idea what I'm doing here :/)
> No, you don't need it. Clock for PHY is provided by on-board oscillator.
>
>> - I am trying to compile a simple program that use it, polling on tcp
>> connection, and I observe nothing. I observe no frame at all on the
>> wireshark interface plugged to the stm32. Do you have some advice to
>> test the low-level protocol, instead of the whole ip stack at once ?
> I use the same stuff i.e Wiresharke + ping ;)
>
>
> Best regards,
> jerzy
>
> 2014-04-10 11:37 GMT+02:00 Valentin BOUSSON <valentin@bousson.com>:
>> Hello John & Jerzy,
>>
>> I took into account all the modifications you make me do onto my ecos build,
>> and so I did :
>>   - in my ecos.db, I added :
>> /
>> /
>> /target stm32f4discovery-bbext {/
>> /        alias { "STMicroelectronics STM32F4-Discovery board with DM-STF4BB
>> extension board" }/
>> /        packages {/
>> /                CYGPKG_HAL_CORTEXM/
>> /                CYGPKG_HAL_CORTEXM_STM32/
>> /                CYGPKG_HAL_CORTEXM_STM32_STM32F4DISCOVERY/
>> /                CYGPKG_IO_FLASH/
>> /                CYGPKG_DEVS_FLASH_STM32/
>> /                CYGPKG_IO_SERIAL_CORTEXM_STM32/
>> /                CYGPKG_IO_ETH_DRIVERS/
>> /                CYGPKG_DEVS_ETH_PHY/
>> /                CYGPKG_DEVS_ETH_CORTEXM_STM32/
>> /        }/
>> /        description "The stm32f4discovery--bbext target provides the
>> packages needed/
>> /        to run eCos on the STMicroelectronics STM32F4-Discovery board with
>> the DM-STF4BB (STM32F4DIS-EXT)."/
>> /}
>> /
>>
>>
>> /
>> /- in my current folder, I was able to generate a configuration with this
>> template, and I added the package concerning LWIP. My configuration is
>> linked to the mail.
>>
>>
>> - I addedin
>> packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h the
>> pins configurationJerzy gave me, and the custom driver. If I understand
>> well, The type of PHY interface is MII, and we have to check the "MII pins
>> remapped".
>>
>>
>>
>>
>> - Concerning the system initialization :
>> ""
>> John said :
>>
>>
>> You might also be necessary to modify the the hal_system_init() function
>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>> Compare with the hal_system_init() function from the STM32x0G platform HAL.
>>
>> ""
>> Concerning this modification, I must admit I'm very new to such embedded
>> platform/systems (as you may have already noticed ;) ), and I don't
>> understand how I am supposed to adapt it. All those pin configuration,
>> clocks linking, etc.. are really obscure to me (for now).
>> Jerzy, how did you do ?
>> The only bunch of code that seems to be useful is concerning the PHY should
>> look like :
>>
>> #if defined(CYGHWR_HAL_CORTEXM_STM32_PHY_CLOCK_MCO)
>>      // Use HSE clock as the MCO1 clock signals for PHY
>>      {
>>          cyg_uint32 acr;
>>
>>          HAL_READ_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>          acr |= CYGHWR_HAL_STM32_RCC_CFGR_MCO1_HSE |
>>              CYGHWR_HAL_STM32_RCC_CFGR_MCO1PRE_1;
>>          HAL_WRITE_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>      }
>> #endif
>>
>> , right ? (I'm no Idea what I'm doing here :/)
>>
>>
>> - I am trying to compile a simple program that use it, polling on tcp
>> connection, and I observe nothing. I observe no frame at all on the
>> wireshark interface plugged to the stm32. Do you have some advice to test
>> the low-level protocol, instead of the whole ip stack at once ?
>>
>>
>>
>> Thank you,
>> Valentin
>>
>>
>>
>>
>> On 25/03/2014 16:25, John Dallaway wrote:
>>> Hi Jerzy and Valentin
>>>
>>> On 25/03/14 12:34, Jerzy Dyrda wrote:
>>>
>>>> ... I have already brought up network interface on
>>>>
>>>> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
>>>> board from Embest, now as I see it's called STM32F4DIS-BB).
>>> Great! Maybe we can work together to get ethernet support for this
>>> platform added to the eCos repository. I think it would be preferable to
>>> define a new target such as "stm32f4discovery_bb" in ecos.db which
>>> includes the STM32 ethernet package. We can then make the necessary
>>> changes within the platform HAL source code conditional on
>>> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
>>> of the STM32F4-Discovery board may wish to wire up a different PHY
>>> component rather than using STM32F4DIS-BB.
>>>
>>> John Dallaway
>>> eCos maintainer
>>> http://www.dallaway.org.uk/john
>>>


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[ECOS] Re: STM32F4 Discovery + LwIP

[Valentin BOUSSON]

Hello,
I'm desperate to see that it seems I have done all like you,
and nothing even went out my Ethernet port..

First,
For the sequential input,**I noticed a*bug*. When I compile my project 
with the sequential mode, the simple.c for the simple mode 
implementation seems to be also linked, that induces some symbols 
conflicts. I didn't succeed to disable this linking error, but wrapping 
the simple.c code by an ugly #if 0 + #endif, errors disappear.

Then, I had some errors to flash my memory, when my ecos configuration 
included also the io_flash package. I'm not sure that the bug comes from 
a real conflict, but I write it down here. I will test better later. If 
I'm right, this plugin is for building some flash filesystem, but is 
useless for my lwip issue.

Finally, I tried all the combination possible to parametrize either 
ethernet driver / or LwIP stack, and nothing yet.
Did you published somewhere your project, or could you show me the ecos 
configuration you used ?

Unfortunatly, I debug blindly, I can only use gdb with  step by step 
execution, and all seems ok, but
How do you do, guys, to debug with your HW? On STM32F4, I see many 
output with USART and serial line, but I have for now no cable for that, 
and I don't know how to output eCos debug outputs.


Thanks again.

Valentin BOUSSON




On 10/04/2014 15:30, Jerzy Dyrda wrote:
> Hello Valentin,
>
>> I thought than once the program start, with nothing more than an empty main and the init phase of eCos,
>> I would have all the necessary threads running for ARP or ping response (at least).
> Yes, you are right. It's needed to call stack initialization procedure
> like that in case of sequential mode :
>      cyg_lwip_sequential_init();
>
> Best regards,
> jerzy
>
> 2014-04-10 15:20 GMT+02:00 Valentin BOUSSON <ml-ecos@belphegor.eu>:
>> Thanks for your help, but I have already tried this configuration,
>> then my problem may come from the way I use lwip stack.
>>
>> I thought than once the program start, with nothing more than an empty main
>> and the init phase of eCos, I would have all the necessary threads running
>> for ARP or ping response (at least).
>>
>> If you confirm me this behaviour, that's I'm missing something in my eCos
>> config. Did you add anything in the initialisation phase ?
>>
>> thanks.
>>
>> Valentin BOUSSON
>>
>>
>>
>>
>> On 10/04/2014 13:53, Jerzy Dyrda wrote:
>>> Hello Valentin,
>>>
>>>
>>> On Thursday 10 of April 2014 11:37:53 you wrote:
>>>
>>>
>>>> I took into account all the modifications you make me do onto my ecos
>>>> build, and so I did :
>>>> - in my ecos.db, I added :
>>>> /
>>>> /
>>>> /target stm32f4discovery-bbext {/
>>>> / alias { "STMicroelectronics STM32F4-Discovery board with
>>>> DM-STF4BB extension board" }/
>>>> / packages {/
>>>> / CYGPKG_HAL_CORTEXM/
>>>> / CYGPKG_HAL_CORTEXM_STM32/
>>>> / CYGPKG_HAL_CORTEXM_STM32_STM32F4DISCOVERY/
>>>> / CYGPKG_IO_FLASH/
>>>> / CYGPKG_DEVS_FLASH_STM32/
>>>> / CYGPKG_IO_SERIAL_CORTEXM_STM32/
>>>> / CYGPKG_IO_ETH_DRIVERS/
>>>> / CYGPKG_DEVS_ETH_PHY/
>>>> / CYGPKG_DEVS_ETH_CORTEXM_STM32/
>>>> / }/
>>>> / description "The stm32f4discovery--bbext target provides the
>>>> packages needed/
>>>> / to run eCos on the STMicroelectronics STM32F4-Discovery board
>>>> with the DM-STF4BB (STM32F4DIS-EXT)."/
>>>> /}
>>>> /
>>> Genau.
>>>
>>>
>>>> /
>>>> /- in my current folder, I was able to generate a configuration with
>>>> this template, and I added the package concerning LWIP. My configuration
>>>> is linked to the mail.
>>>>
>>>> - I addedin
>>>> packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h the
>>>> pins configurationJerzy gave me, and the custom driver.
>>> Genau.
>>>
>>>
>>>> If I understand
>>>> well, The type of PHY interface is MII, and we have to check the "MII
>>>> pins remapped".
>>> Nope. PHY interface type is RMII. So it has to be set RMII interface
>>> in ecc file:
>>>
>>>
>>> # Type of interface used to connect with PHY : MII or RMII
>>> #
>>> cdl_option CYGSEM_DEVS_ETH_CORTEXM_STM32_INTF {
>>> # Flavor: data
>>> user_value RMII
>>>
>>> # value_source user
>>> # Default value: RMII
>>> # Legal values: "MII" "RMII"
>>> };
>>>
>>> but please use graphical eCos Configuration Tool to fix it.
>>>
>>>> - Concerning the system initialization :
>>>> ""
>>>> John said :
>>>>
>>>> You might also be necessary to modify the the hal_system_init() function
>>>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>>>> Compare with the hal_system_init() function from the STM32x0G platform
>>>> HAL.
>>>>
>>>> ""
>>>> Concerning this modification, I must admit I'm very new to such embedded
>>>> platform/systems (as you may have already noticed ;) ), and I don't
>>>> understand how I am supposed to adapt it. All those pin configuration,
>>>> clocks linking, etc.. are really obscure to me (for now).
>>>> Jerzy, how did you do ?
>>>> The only bunch of code that seems to be useful is concerning the PHY
>>>> should look like :
>>>>
>>>> #if defined(CYGHWR_HAL_CORTEXM_STM32_PHY_CLOCK_MCO)
>>>> // Use HSE clock as the MCO1 clock signals for PHY
>>>> {
>>>> cyg_uint32 acr;
>>>>
>>>> HAL_READ_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>>> acr |= CYGHWR_HAL_STM32_RCC_CFGR_MCO1_HSE |
>>>> CYGHWR_HAL_STM32_RCC_CFGR_MCO1PRE_1;
>>>> HAL_WRITE_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>>> }
>>>> #endif
>>>>
>>>> , right ? (I'm no Idea what I'm doing here :/)
>>> No, you don't need it. Clock for PHY is provided by on-board oscillator.
>>>
>>>> - I am trying to compile a simple program that use it, polling on tcp
>>>> connection, and I observe nothing. I observe no frame at all on the
>>>> wireshark interface plugged to the stm32. Do you have some advice to
>>>> test the low-level protocol, instead of the whole ip stack at once ?
>>> I use the same stuff i.e Wiresharke + ping ;)
>>>
>>>
>>> Best regards,
>>> jerzy
>>>
>>> 2014-04-10 11:37 GMT+02:00 Valentin BOUSSON <valentin@bousson.com>:
>>>> Hello John & Jerzy,
>>>>
>>>> I took into account all the modifications you make me do onto my ecos
>>>> build,
>>>> and so I did :
>>>>    - in my ecos.db, I added :
>>>> /
>>>> /
>>>> /target stm32f4discovery-bbext {/
>>>> /        alias { "STMicroelectronics STM32F4-Discovery board with
>>>> DM-STF4BB
>>>> extension board" }/
>>>> /        packages {/
>>>> /                CYGPKG_HAL_CORTEXM/
>>>> /                CYGPKG_HAL_CORTEXM_STM32/
>>>> /                CYGPKG_HAL_CORTEXM_STM32_STM32F4DISCOVERY/
>>>> /                CYGPKG_IO_FLASH/
>>>> /                CYGPKG_DEVS_FLASH_STM32/
>>>> /                CYGPKG_IO_SERIAL_CORTEXM_STM32/
>>>> /                CYGPKG_IO_ETH_DRIVERS/
>>>> /                CYGPKG_DEVS_ETH_PHY/
>>>> /                CYGPKG_DEVS_ETH_CORTEXM_STM32/
>>>> /        }/
>>>> /        description "The stm32f4discovery--bbext target provides the
>>>> packages needed/
>>>> /        to run eCos on the STMicroelectronics STM32F4-Discovery board
>>>> with
>>>> the DM-STF4BB (STM32F4DIS-EXT)."/
>>>> /}
>>>> /
>>>>
>>>>
>>>> /
>>>> /- in my current folder, I was able to generate a configuration with this
>>>> template, and I added the package concerning LWIP. My configuration is
>>>> linked to the mail.
>>>>
>>>>
>>>> - I addedin
>>>> packages/hal/cortexm/stm32/stm32f4discovery/current/include/plf_io.h the
>>>> pins configurationJerzy gave me, and the custom driver. If I understand
>>>> well, The type of PHY interface is MII, and we have to check the "MII
>>>> pins
>>>> remapped".
>>>>
>>>>
>>>>
>>>>
>>>> - Concerning the system initialization :
>>>> ""
>>>> John said :
>>>>
>>>>
>>>> You might also be necessary to modify the the hal_system_init() function
>>>> in the STM32F4-Discovery platform HAL to setup the ethernet hardware.
>>>> Compare with the hal_system_init() function from the STM32x0G platform
>>>> HAL.
>>>>
>>>> ""
>>>> Concerning this modification, I must admit I'm very new to such embedded
>>>> platform/systems (as you may have already noticed ;) ), and I don't
>>>> understand how I am supposed to adapt it. All those pin configuration,
>>>> clocks linking, etc.. are really obscure to me (for now).
>>>> Jerzy, how did you do ?
>>>> The only bunch of code that seems to be useful is concerning the PHY
>>>> should
>>>> look like :
>>>>
>>>> #if defined(CYGHWR_HAL_CORTEXM_STM32_PHY_CLOCK_MCO)
>>>>       // Use HSE clock as the MCO1 clock signals for PHY
>>>>       {
>>>>           cyg_uint32 acr;
>>>>
>>>>           HAL_READ_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>>>           acr |= CYGHWR_HAL_STM32_RCC_CFGR_MCO1_HSE |
>>>>               CYGHWR_HAL_STM32_RCC_CFGR_MCO1PRE_1;
>>>>           HAL_WRITE_UINT32(base + CYGHWR_HAL_STM32_RCC_CFGR, acr);
>>>>       }
>>>> #endif
>>>>
>>>> , right ? (I'm no Idea what I'm doing here :/)
>>>>
>>>>
>>>> - I am trying to compile a simple program that use it, polling on tcp
>>>> connection, and I observe nothing. I observe no frame at all on the
>>>> wireshark interface plugged to the stm32. Do you have some advice to test
>>>> the low-level protocol, instead of the whole ip stack at once ?
>>>>
>>>>
>>>>
>>>> Thank you,
>>>> Valentin
>>>>
>>>>
>>>>
>>>>
>>>> On 25/03/2014 16:25, John Dallaway wrote:
>>>>> Hi Jerzy and Valentin
>>>>>
>>>>> On 25/03/14 12:34, Jerzy Dyrda wrote:
>>>>>
>>>>>> ... I have already brought up network interface on
>>>>>>
>>>>>> STM32F4DISCOVERY + DM-STF4BB (AFAIK this is original name of base
>>>>>> board from Embest, now as I see it's called STM32F4DIS-BB).
>>>>> Great! Maybe we can work together to get ethernet support for this
>>>>> platform added to the eCos repository. I think it would be preferable to
>>>>> define a new target such as "stm32f4discovery_bb" in ecos.db which
>>>>> includes the STM32 ethernet package. We can then make the necessary
>>>>> changes within the platform HAL source code conditional on
>>>>> CYGPKG_DEVS_ETH_CORTEXM_STM32. We need to bear in mind that some users
>>>>> of the STM32F4-Discovery board may wish to wire up a different PHY
>>>>> component rather than using STM32F4DIS-BB.
>>>>>
>>>>> John Dallaway
>>>>> eCos maintainer
>>>>> http://www.dallaway.org.uk/john
>>>>>


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