From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8760 invoked by alias); 10 Mar 2006 17:25:48 -0000 Received: (qmail 8752 invoked by uid 22791); 10 Mar 2006 17:25:48 -0000 X-Spam-Check-By: sourceware.org Received: from zproxy.gmail.com (HELO zproxy.gmail.com) (64.233.162.201) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 10 Mar 2006 17:25:47 +0000 Received: by zproxy.gmail.com with SMTP id 14so809108nzn for ; Fri, 10 Mar 2006 09:25:45 -0800 (PST) Received: by 10.36.48.15 with SMTP id v15mr98471nzv; Fri, 10 Mar 2006 09:25:44 -0800 (PST) Received: by 10.36.33.4 with HTTP; Fri, 10 Mar 2006 09:25:44 -0800 (PST) Message-ID: <6f506bf60603100925u2f8abadas9e483125fc096c65@mail.gmail.com> Date: Fri, 10 Mar 2006 17:25:00 -0000 From: "Grant Mills" To: "Alex Schuilenburg" Cc: yh@bizmail.com.au, ecos-discuss@ecos.sourceware.org, "Andrew Lunn" In-Reply-To: <44116022.7080103@ecoscentric.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline References: <33243.58.105.227.226.1141966547.squirrel@58.105.227.226> <44116022.7080103@ecoscentric.com> X-IsSubscribed: yes Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Subject: Re: [ECOS] Modifying RedBoot to support multiple flash devices X-SW-Source: 2006-03/txt/msg00120.txt.bz2 On 3/10/06, Alex Schuilenburg wrote: > yh@bizmail.com.au wrote: > > Hello Alex, > > > > I am looking for redboot to support Intel P3 and I took the snapshot, b= ut > > seems that the intel/stratav2 is empty. Where can I find the source code > > for supporting P3? > > As Andrew said, the intel/stratav2 directory is the flash_v2 branch. My > bad as I did not realise we were not generating snapshots of the > flash_v2 branch (now added to the cron to generate future snapshots for > flash_v2 until the merge). > > To kickstart, I have also just generated a flash_v2 snapshot but it > looks like you may have lucked out with P3 support. > > -- Alex > > > > -- > Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos > and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss > > There is not a lot to supporting the P30 Flash Family from Intel.=20 =46rom my perspective there are three main hurdles: 1. The entire chip is locked at reset. This means that the implementation will need to check for lock before any write/erase operation. This may already be in place. 2. When supporting 512Mb and greater, the flash chip itself contains multiple dies. Each die is a 256Mb P30. Therefore, you'll need to track them as independent devices (at least I would.) 3. Lastly, the 1Gb version has two chip selects. This is more of a hardware issue than a firmware but worth mentioning. As I will be looking at the flash_v2 branch here soon, I'll see if I can get some P30 support in before my own deadlines. If not, I'll table it til afterwards. -- Grant Mills gmills@ucsd.edu -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss