Grant Edwards <grante@visi.com> writes:

> On 2006-01-14, Paul D. DeRocco <pderocco@ix.netcom.com> wrote:
>
>> If the transmitter has a hardware FIFO, and the software
>> transmits one byte per interrupt,
>
> Then the sofware is completely and utterly broken.  It doesn't
> deserve to work.
>
>> then presenting a block of data to it after an idle period
>> will invoke the ISR/DSR a slew of times until the FIFO is
>> full.
>
> That's insane. Nobody with a clue would write software like that.

Actually, the generic 16x5x serial driver in eCos works exactly like
that.

> When you get a TX interrupt you write data to the tx FIFO until it's
> full.

Yep. I've made a somewhat quick-and-dirty fix that is attached below.


Regards,
-- 
Daniel Néri <daniel.neri@sigicom.se>
Sigicom AB, Stockholm, Sweden