From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26786 invoked by alias); 26 Oct 2009 21:05:07 -0000 Received: (qmail 26769 invoked by uid 22791); 26 Oct 2009 21:05:05 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=BAYES_00 X-Spam-Check-By: sourceware.org Received: from netic.com (HELO netic.com) (208.131.130.247) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 26 Oct 2009 21:04:57 +0000 Received: from [120.18.177.184] ([120.18.177.184]) by netic.com (8.13.1/8.13.1) with ESMTP id n9QL4XBu001883; Mon, 26 Oct 2009 15:04:37 -0600 From: Laurie Gellatly To: Sergei Gavrikov In-Reply-To: <20091026203636.GA10662@sg-laptop> References: <20091026203636.GA10662@sg-laptop> Message-Id: Content-Type: text/plain; charset=us-ascii; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (iPhone Mail 7D11) Date: Mon, 26 Oct 2009 21:05:00 -0000 Cc: eCos discuss-list X-IsSubscribed: yes Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Subject: Re: [ECOS] LPC2XXX watchdog feeds and interrupts X-SW-Source: 2009-10/txt/msg00162.txt.bz2 Hi Sergei, Two things. It should not be an option as when the feed sequence is eventually interrupted and the processor is reset it can be VERY time consuming to track down. I know from bitter experience. The other is I was not sure about which interrupt disable/enable function pairs to use. Is HAL_DISABLE_INTERRUPTS preferred over cyg_disable_interrupts? We need ALL interrupts off during the feed. ...Laurie:{) +61 416 114419 On 27/10/2009, at 7:40 AM, Sergei Gavrikov wrote: > On Mon, Oct 26, 2009 at 08:58:19PM +1100, Laurie Gellatly wrote: >> Hi All, I using an ARM 7 (LPC2212) based on an eCosCentric build. It >> appears that watchdog feeds are done with interrupts enabled yet the >> NXP manual warns against leaving interrupts enabled during a feed >> sequence (and I'm pretty sure I've seen the consequences). Firstly, >> have I missed something? Are interrupts disabled and I just don't >> see where when I call watchdog_reset() OR should I be adding >> cyg_interrupt_disable() and cyg_interrupt_enable() calls around the >> feed sequence in watchdog_lpc2xxx.cxx >> >> Thanks ...Laurie:{) > > Hello Laurie, > > I found no any global interrupt disabling/enabling workaround for eCos > io/watchdog *::reset. More that the most targets as I could see have a > peace with CPU's watchdog with a single atomic write, but NXP and some > other targets claim two writes (!atomic operation): devs/watchdog/* > > Well, NXP points on such a claim, for example, in this application > note > http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/an10414.pdf > and in their other data sheets. Well, may be that is rare condition: > to break two sequenced writes, but safety is safety :-) Could you > provide a patch for the issue, please`? > > IMO, you would add some CDL in devs/watchdog/arm/lpc2xxx/*/*, e.g. > CYGOPT_DEVICES_WATCHDOG_ARM_LPC2XXX_RESET_SAFE to wrap that reset, > well, to add something likes the below > > int old; > HAL_DISABLE_INTERRUPTS( old ); > /* Feed magic values to reset the watchdog. */ > /* ... */ > HAL_RESTORE_INTERRUPTS( old ); > > But, as I could understand, you pointed on eCosCentric build. > > HTH > > Sergei > -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss