[ECOS] Problem with PowerPC cache init order

[ECOS] Problem with PowerPC cache init order

[Retallack, Mark (Siemens)]

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I have found a problem with the PowerPC architecture hal. 

The sequence for cache initialisation after reset (in hal_enable_caches)
should be:

unlock all
invalidate all
enable cache

Instead it is:

invalidate all
unlock all
enable cache

This can cause problems if there are sections of the cache that are locked
and contain invalid data. My target crashed with an exception when it needed
to do a copyback after a first time power up (not a pretty sight!!). The
copyback address was an invalid address.

I have attached a patch to fix the problem. This works for the MPC850, but I
do not know if it is correct for the complete PowerPC family.

 <<my.patch>> 

Mark Retallack
Graduate Engineer
Siemens Traffic Controls 
Sopers Lane, Poole, Dorset. BH17 7ER. UK.
Tel: 01202 782844
Fax: 01202 782545
www.siemenstraffic.com

Committed to quality traffic solutions and service excellence





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[-- Attachment #2: my.patch --]
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diff -r -u5 -N -x CVS -x '*~' -x '.#*' clean/ecos/packages/hal/powerpc/arch/current/src/hal_misc.c devo/ecos/packages/hal/powerpc/arch/current/src/hal_misc.c
--- clean/ecos/packages/hal/powerpc/arch/current/src/hal_misc.c	2003-12-08 15:34:57.000000000 +0000
+++ devo/ecos/packages/hal/powerpc/arch/current/src/hal_misc.c	2004-06-14 13:38:55.033750000 +0100
@@ -298,27 +298,27 @@
 // Specific behavior for each platform configured via plf_cache.h
 
 externC void
 hal_enable_caches(void)
 {
-#ifndef CYG_HAL_STARTUP_RAM
-    // Invalidate caches
-    HAL_DCACHE_INVALIDATE_ALL();
-    HAL_ICACHE_INVALIDATE_ALL();
-#endif
-
 #ifdef CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP
 #ifdef HAL_ICACHE_UNLOCK_ALL
     HAL_ICACHE_UNLOCK_ALL();
 #endif
+#ifndef CYG_HAL_STARTUP_RAM    
+    HAL_ICACHE_INVALIDATE_ALL();
+#endif
     HAL_ICACHE_ENABLE();
 #endif
 
 #ifdef CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP
 #ifdef HAL_DCACHE_UNLOCK_ALL
-    HAL_DCACHE_UNLOCK_ALL();
+    HAL_DCACHE_UNLOCK_ALL(); 
 #endif
+#ifndef CYG_HAL_STARTUP_RAM    
+    HAL_DCACHE_INVALIDATE_ALL();
+#endif  
     HAL_DCACHE_ENABLE();
 #ifdef HAL_DCACHE_WRITE_MODE
 #ifdef CYGSEM_HAL_DCACHE_STARTUP_MODE_COPYBACK
     HAL_DCACHE_WRITE_MODE(HAL_DCACHE_WRITEBACK_MODE);
 #else


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