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From: "Enrico Piria" <epiria@libero.it>
To: "ecos-discuss" <ecos-discuss@sourceware.org>
Subject: [ECOS] Memory mapped IO
Date: Wed, 20 Jul 2005 17:02:00 -0000	[thread overview]
Message-ID: <IJXRCL$5A4CA4D35AE57992D6BB1F33EC586636@libero.it> (raw)

Hello.
I'm rewriting the port of eCos to ColdFire.
This processor has a large number of IO registers mapped to memory.
I have two alternatives in writing code to manage the
IO registers.
The first one is to use a data structure that maps all the
registers, like the following:

typedef volatile struct {
cyg_uint32 reg1;
cyg_uint16 reg2;
cyg_uint16 pad;
} __attribute__ ((aligned (4), packed)) regs_t;

Then I can assign the base address of the registers to
a pointer of type regs_t:

regs_t *regs = (regs_t *)BASE_ADDRESS;

and start using the structure:

regs->reg2 = regs->reg2 + VALUE;

However, although the GCC produces the correct code,
nothing guarantees that read/write accesses to the registers
will be done in a single instruction (ColdFire permits
8, 16, or 32 bit read or write accesses to memory).

The alternative is to use the
HAL_READ_UINTx/HAL_WRITE_UINTx macros.
However, the code this way becomes much less readable:

cyg_uint16 tmpvariable;

HAL_READ_UINT16(&regs->reg2, tmpvariable);
HAL_WRITE_UINT16(&regs->reg2, tmpvariable + VALUE);

Moreover, this code is error prone, because I need to specify
the size of the access.

What is the better thing to do?

Thank you

Enrico







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                 reply	other threads:[~2005-07-20 17:02 UTC|newest]

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