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* [ECOS] Performance counter interrupt on XScale
@ 2001-08-23 16:01 Cristiano Ligieri Pereira
  2001-08-23 19:29 ` Cristiano Ligieri Pereira
  0 siblings, 1 reply; 6+ messages in thread
From: Cristiano Ligieri Pereira @ 2001-08-23 16:01 UTC (permalink / raw)
  To: ecos-discuss

Hi folks,

I'm trying to make the clock interrupt work properly on my XScale board
but it doesn't seem to be working right. I'm using the same code as the
IQ80310 port, but I'm using the version that implements it using the CCNT.
The CCNT (clock counter) which is basically incremented every clock cycle
and interrupts generating a IRQ when the maximum value (0xffffffff) is
reached.

Independently of the initial value (RTC period) I'm assigning to the CCNT
register the interrupts are being raised _quite_ slolwy (every 10 seconds
approximately). Have anyone else had the same problem before? 

thanks,
Cristiano.

------------------------------------------------------------
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [ECOS] Performance counter interrupt on XScale
  2001-08-23 16:01 [ECOS] Performance counter interrupt on XScale Cristiano Ligieri Pereira
@ 2001-08-23 19:29 ` Cristiano Ligieri Pereira
  2001-08-28 11:35   ` Cristiano Ligieri Pereira
  0 siblings, 1 reply; 6+ messages in thread
From: Cristiano Ligieri Pereira @ 2001-08-23 19:29 UTC (permalink / raw)
  To: ecos-discuss

Hi,

This is my problem, more specifically. The processor is running at 600Mhz.
If I set the value of the counter as 0xFFFFFFFF - 60000000, which should
give me 10 interrupts (ticks) per second, it works fine. However, if I try
to get 100 interrupts per second (eCos default in most systems) setting
the counter to 0xFFFFFFFF - 6000000 I doesn't work. I simply get very long
delays (using cyg_thread_delay function), as opposed to get shorter delays
as it should work.

Any ideas why? 

Cristiano.

------------------------------------------------------------
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira

On Thu, 23 Aug 2001, Cristiano Ligieri Pereira wrote:

> 
> Hi folks,
> 
> I'm trying to make the clock interrupt work properly on my XScale board
> but it doesn't seem to be working right. I'm using the same code as the
> IQ80310 port, but I'm using the version that implements it using the CCNT.
> The CCNT (clock counter) which is basically incremented every clock cycle
> and interrupts generating a IRQ when the maximum value (0xffffffff) is
> reached.
> 
> Independently of the initial value (RTC period) I'm assigning to the CCNT
> register the interrupts are being raised _quite_ slolwy (every 10 seconds
> approximately). Have anyone else had the same problem before? 
> 
> thanks,
> Cristiano.
> 
> ------------------------------------------------------------
> Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira
> 
> 



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [ECOS] Performance counter interrupt on XScale
  2001-08-23 19:29 ` Cristiano Ligieri Pereira
@ 2001-08-28 11:35   ` Cristiano Ligieri Pereira
  2001-09-06 12:37     ` Jonathan Larmour
  0 siblings, 1 reply; 6+ messages in thread
From: Cristiano Ligieri Pereira @ 2001-08-28 11:35 UTC (permalink / raw)
  To: ecos-discuss

My problem with the interrupts is fixed now, but I think there is a bug in
the IQ80310 port. When using the CCNT as the source of RTC ticks the PMU
interrupts have to be steered to FIQ, otherwise it doens't work properly.

Cristiano.

------------------------------------------------------------
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira

On Thu, 23 Aug 2001, Cristiano Ligieri Pereira wrote:

> 
> Hi,
> 
> This is my problem, more specifically. The processor is running at 600Mhz.
> If I set the value of the counter as 0xFFFFFFFF - 60000000, which should
> give me 10 interrupts (ticks) per second, it works fine. However, if I try
> to get 100 interrupts per second (eCos default in most systems) setting
> the counter to 0xFFFFFFFF - 6000000 I doesn't work. I simply get very long
> delays (using cyg_thread_delay function), as opposed to get shorter delays
> as it should work.
> 
> Any ideas why? 
> 
> Cristiano.


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [ECOS] Performance counter interrupt on XScale
  2001-08-28 11:35   ` Cristiano Ligieri Pereira
@ 2001-09-06 12:37     ` Jonathan Larmour
  2001-09-06 12:45       ` Mark Salter
  0 siblings, 1 reply; 6+ messages in thread
From: Jonathan Larmour @ 2001-09-06 12:37 UTC (permalink / raw)
  To: Cristiano Ligieri Pereira; +Cc: ecos-discuss

Cristiano Ligieri Pereira wrote:
> 
> My problem with the interrupts is fixed now, but I think there is a bug in
> the IQ80310 port. When using the CCNT as the source of RTC ticks the PMU
> interrupts have to be steered to FIQ, otherwise it doens't work properly.

Do you know what the specific reason is? Do you have a patch?

Jifl
-- 
Red Hat, Rustat House, Clifton Road, Cambridge, UK. Tel: +44 (1223) 271062
Maybe this world is another planet's Hell -Aldous Huxley || Opinions==mine

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [ECOS] Performance counter interrupt on XScale
  2001-09-06 12:37     ` Jonathan Larmour
@ 2001-09-06 12:45       ` Mark Salter
  2001-09-06 15:29         ` Cristiano Ligieri Pereira
  0 siblings, 1 reply; 6+ messages in thread
From: Mark Salter @ 2001-09-06 12:45 UTC (permalink / raw)
  To: jlarmour; +Cc: cpereira, ecos-discuss

>>>>> Jonathan Larmour writes:

> Cristiano Ligieri Pereira wrote:
>> 
>> My problem with the interrupts is fixed now, but I think there is a bug in
>> the IQ80310 port. When using the CCNT as the source of RTC ticks the PMU
>> interrupts have to be steered to FIQ, otherwise it doens't work properly.

> Do you know what the specific reason is? Do you have a patch?

And are you sure its FIQ? The Rev F boards have a switch which allows
you to swap FIQ and IRQ inputs. That can lead to a bit of confusion.

--Mark

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [ECOS] Performance counter interrupt on XScale
  2001-09-06 12:45       ` Mark Salter
@ 2001-09-06 15:29         ` Cristiano Ligieri Pereira
  0 siblings, 0 replies; 6+ messages in thread
From: Cristiano Ligieri Pereira @ 2001-09-06 15:29 UTC (permalink / raw)
  To: Mark Salter; +Cc: jlarmour, ecos-discuss

I think you can ignore my message. My problem was not the one I told you
before. It was something else not related to this. Sorry about
that. :-) Steering or not steering the interrupts like I said doesn't make
any difference actually.

Cristiano.

------------------------------------------------------------
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira

On Thu, 6 Sep 2001, Mark Salter wrote:

> >>>>> Jonathan Larmour writes:
> 
> > Cristiano Ligieri Pereira wrote:
> >> 
> >> My problem with the interrupts is fixed now, but I think there is a bug in
> >> the IQ80310 port. When using the CCNT as the source of RTC ticks the PMU
> >> interrupts have to be steered to FIQ, otherwise it doens't work properly.
> 
> > Do you know what the specific reason is? Do you have a patch?
> 
> And are you sure its FIQ? The Rev F boards have a switch which allows
> you to swap FIQ and IRQ inputs. That can lead to a bit of confusion.
> 
> --Mark
> 
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2001-09-06 15:29 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2001-08-23 16:01 [ECOS] Performance counter interrupt on XScale Cristiano Ligieri Pereira
2001-08-23 19:29 ` Cristiano Ligieri Pereira
2001-08-28 11:35   ` Cristiano Ligieri Pereira
2001-09-06 12:37     ` Jonathan Larmour
2001-09-06 12:45       ` Mark Salter
2001-09-06 15:29         ` Cristiano Ligieri Pereira

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