From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31107 invoked by alias); 5 May 2011 14:30:54 -0000 Received: (qmail 31092 invoked by uid 22791); 5 May 2011 14:30:52 -0000 X-SWARE-Spam-Status: No, hits=-0.9 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RFC_ABUSE_POST,TW_JJ,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from snt0-omc1-s2.snt0.hotmail.com (HELO snt0-omc1-s2.snt0.hotmail.com) (65.55.90.13) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 05 May 2011 14:30:37 +0000 Received: from SNT122-W41 ([65.55.90.7]) by snt0-omc1-s2.snt0.hotmail.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 5 May 2011 07:30:35 -0700 Message-ID: From: jjp jjp To: Date: Thu, 05 May 2011 14:30:00 -0000 In-Reply-To: <4DC1D4D0.2070205@siva.com.mk> References: <4D41EB2B.5080504@siva.com.mk> <4D9F6B61.705@siva.com.mk> <4DA49538.60100@siva.com.mk> <4DA5C749.2040706@siva.com.mk> <4DA6D20B.7080908@siva.com.mk> ,, ,<4DC03706.9040708@siva.com.mk> ,<4DC1D4D0.2070205@siva.com.mk> Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact ecos-discuss-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: ecos-discuss-owner@ecos.sourceware.org Subject: RE: [ECOS] Kinetis TWR-K60N512-KIT questions X-SW-Source: 2011-05/txt/msg00014.txt.bz2 Hi, I test unified RAM configuration and it works for me with some modification= s. =A0=A0 -. Replace SRAM by RAM hal_cortexm_kinetis_twr_k60n512.cdl to disabl= e execution of SWI in hal_reset_vsr (line 187). Execution of this part reset tower and flash code= runs again. =A0=A0 -. Lookup /dev/ser3 and make cyg_io_write instead of printf. Code wi= th printf reset tower and flash code runs again. I also try to use cortexm exception support but it fails. I install an exception handler with cyg_exception_set_handler for CYGNUM_HA= L_VECTOR_SERVICE (vector 11 -> SVCall). I make a SWI call an I expect it to modify execution= flow to call my exception handler. SWI calls hal_default_svc_vsr and R3 get a dummy value not a function addre= ss value. Why software interrupt doesn't call hal_default_exception_vsr? Regards. ---------------------------------------- > Date: Thu, 5 May 2011 00:36:00 +0200 > From: ilijak@siva.com.mk > To: ecos-discuss@ecos.sourceware.org > Subject: Re: [ECOS] Kinetis TWR-K60N512-KIT questions > > On 04.05.2011 12:46, jjp jjp wrote: > > Hi, > > It works with ecos toolchain and gcc-4.6 with -mcpu=3Dcortex-m4! > > Great job Ilija. > > Thanks for good words. > I am testing some integer DFT code with gcc-4.6 / Cortex-M4. Shows > performance improvement over M3 code even for plain C code. > > > My miktake was to put optimization flag to -O0 in global flags. > > I will test your RAM configuration and give you feedbacks. > > I appreciate. > > Regards > Ilija > > > -- > Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos > and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss > =20=09=09=20=09=20=20=20=09=09=20=20 -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss