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From: Gary Thomas <gthomas@redhat.com>
To: Dan Hovang <dan.hovang@cpen.com>
Cc: Ecos Discuss <ecos-discuss@sourceware.cygnus.com>
Subject: RE: [ECOS] on ARM: Using the FIQ vector
Date: Fri, 28 Jan 2000 06:20:00 -0000	[thread overview]
Message-ID: <XFMail.000128072010.gthomas@redhat.com> (raw)
In-Reply-To: <38919E4A.8FE2D7D1@cpen.com>

On 28-Jan-00 Dan Hovang wrote:
> Hello,
> 
> I'm using the FIQ vector to process data which arrives at a very high
> rate. My problem is that I'm unable to control the enable/disable FIQ
> bit of the cpsr. At first, I figured it was just to exclude the FIQ
> bit from the HAL_* macros but after some poking around I found that
> the FIQ bit has a per-thread value which is set every time a new thread
> is created (CPSR_THREAD_INITIAL in arm/arch/v1_2_1/src/hal_arch.h).
> 

Firstly, I'd suggest that you keep up with eCos development by using CVS.
Recent changes to the eCos source base are available via CVS, on a [more
or less] weekly basis.  The code base you're using is extremely old.

For details on using CVS, see http://sourceware.cygnus.com/ecos/

> The only workaround I see would be to exclude the FIQ bit from
> load_context in context.S aswell as from all relevant HAL_* macros.
> It feels like kind of a 'hack' tough. Is there some code design with
> the intention to solve this which I missed out?
> 

I'm a little confused about what you want to accomplish.  Are you interested
in masking _all_ FIQ interrupts or just one.  Perhaps if you could provide
a pseudo-code scenario, I can make some suggestions.

  reply	other threads:[~2000-01-28  6:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-01-28  5:48 Dan Hovang
2000-01-28  6:20 ` Gary Thomas [this message]
2000-01-28  7:10   ` Dan Hovang
2000-01-28 11:40     ` Gary Thomas
2000-01-28  7:15 ` Hugo 'NOx' Tyson
2000-01-28  7:15   ` Hugo 'NOx' Tyson
2000-01-28  7:37   ` Dan Hovang
2000-01-28  7:50     ` Gary Thomas

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