From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesper Skov <jskov@redhat.com>
To: Ross Wightman <rpw@velvet.microplex.com>
Cc: ecos-discuss@sources.redhat.com
Subject: Re: [ECOS] DBG Serial Init Problem with MBX based code
Date: Tue, 29 Aug 2000 23:53:00 -0000
Message-id: <otya1f8ckk.fsf@thinktwice.zoftcorp.dk>
References: <Pine.LNX.4.10.10008291645500.2685-100000@velvet.microplex.com>
X-SW-Source: 2000-08/msg00330.html

>>>>> "Ross" == Ross Wightman <rpw@velvet.microplex.com> writes:
Ross> This problem would be easy to "hack" fix. However, I would like
Ross> some insight into why this is setup as is (if it should be?) and
Ross> what a good fix would entail.

I think something like the below is what we want. Could you please see
if it fixes your problem - if so, I will commit it.

Ta,
Jesper


Index: ChangeLog
===================================================================
RCS file: /local/cvsfiles/ecc/ecc/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.26
diff -u -5 -r1.26 ChangeLog
--- ChangeLog	2000/06/30 08:30:55	1.26
+++ ChangeLog	2000/08/30 06:50:58
@@ -1,5 +1,10 @@
+2000-08-30  Jesper Skov  <jskov@redhat.com>
+
+	* src/quicc_smc1.c (cyg_hal_plf_serial_init_channel): Move all
+	init code to init_channel.
+
 2000-06-30  Jesper Skov  <jskov@redhat.com>
 
 	* src/quicc_smc1.c: calling i/f macro changes.
 
 2000-06-28  Jesper Skov  <jskov@redhat.com>
Index: src/quicc_smc1.c
===================================================================
RCS file: /local/cvsfiles/ecc/ecc/hal/powerpc/quicc/current/src/quicc_smc1.c,v
retrieving revision 1.25
diff -u -5 -r1.25 quicc_smc1.c
--- src/quicc_smc1.c	2000/06/30 08:30:55	1.25
+++ src/quicc_smc1.c	2000/08/30 06:52:44
@@ -91,19 +91,26 @@
  */	
 void
 cyg_hal_plf_serial_init_channel(void)
 {
     EPPC *eppc;
+    int i;
     volatile struct smc_uart_pram *uart_pram;
     struct cp_bufdesc *txbd, *rxbd;
 
     static int init_done = 0;
     if (init_done) return;
     init_done++;
 
     eppc = eppc_base();
 
+    /*
+     *  Reset communications processor
+     */
+    eppc->cp_cr = QUICC_CPM_CR_RESET | QUICC_CPM_CR_BUSY;
+    for (i = 0; i < 100000; i++);
+
     /* SMC1 Uart parameter ram */
     uart_pram = &eppc->pram[2].scc.pothers.smc_modem.psmc.u;
 
     /* tx and rx buffer descriptors */
     txbd = (struct cp_bufdesc *)((char *)eppc + Txbd);
@@ -458,21 +465,14 @@
 cyg_hal_plf_serial_init(void)
 {
     hal_virtual_comm_table_t* comm;
     int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
     volatile EPPC *eppc = eppc_base();
-    int i;
 
     static int init = 0;  // It's wrong to do this more than once
     if (init) return;
     init++;
-
-    /*
-     *  Reset communications processor
-     */
-    eppc->cp_cr = QUICC_CPM_CR_RESET | QUICC_CPM_CR_BUSY;
-    for (i = 0; i < 100000; i++);
 
     cyg_hal_plf_serial_init_channel();
 
     // Setup procs in the vector table