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From: Nick Garnett <nickg@cygnus.co.uk>
To: ecos-discuss@sources.redhat.com
Subject: Re: [ECOS] MIPS R3000 patch for MIPS arch
Date: Mon, 16 Apr 2001 06:34:00 -0000	[thread overview]
Message-ID: <pou2fc2y9w.fsf@balti.cygnus.co.uk> (raw)
In-Reply-To: <3936FE39.7F7BA9BD@redhat.co.uk>

Jonathan Larmour <jlarmour@redhat.co.uk> writes:

> Jurica Baricevic wrote:
> > 

> > Namely, '#ifdef CYG_HAL_MIPS_R3900' and similar
> > statements should be avoided if possible; and something like '#ifdef
> > CYG_HAL_MIPS_ISA1' should be put on right places instead.
> 
> I agree, and in fact I'd be happy to take this patch with such
> improvements. Tim, I think it would be more generic for each variant HAL to
> define the ISA level supported in the CDL, e.g. for tx39:


Bear in mind that most real MIPS implementations are actually a
mixture of ISA levels, very few adhere strictly to just one. The TX39,
for example is mostly ISA2 with some ISA3 instructions added (cache
instructions for example). So naive use of straight ISA levels will
not allow an accurate description of the instruction set of any actual
implementation.

There really needs to be a separate configuration option for each
place where there is a choice of instructions, and to control these
individually. That way the TX39 can have ISA2 style interrupt returns
with ISA3 cache control.

-- 
Nick Garnett
Cygnus Solutions, a Red Hat Company
Cambridge, UK

WARNING: multiple messages have this Message-ID
From: Nick Garnett <nickg@cygnus.co.uk>
To: ecos-discuss@sources.redhat.com
Subject: Re: [ECOS] MIPS R3000 patch for MIPS arch
Date: Wed, 05 Sep 2001 00:10:00 -0000	[thread overview]
Message-ID: <pou2fc2y9w.fsf@balti.cygnus.co.uk> (raw)
Message-ID: <20010905001000.todnGYnUqqbPa7s1rWlhkh6ncgMNTayItpjiaYbquaM@z> (raw)
In-Reply-To: <3936FE39.7F7BA9BD@redhat.co.uk>

Jonathan Larmour <jlarmour@redhat.co.uk> writes:

> Jurica Baricevic wrote:
> > 

> > Namely, '#ifdef CYG_HAL_MIPS_R3900' and similar
> > statements should be avoided if possible; and something like '#ifdef
> > CYG_HAL_MIPS_ISA1' should be put on right places instead.
> 
> I agree, and in fact I'd be happy to take this patch with such
> improvements. Tim, I think it would be more generic for each variant HAL to
> define the ISA level supported in the CDL, e.g. for tx39:


Bear in mind that most real MIPS implementations are actually a
mixture of ISA levels, very few adhere strictly to just one. The TX39,
for example is mostly ISA2 with some ISA3 instructions added (cache
instructions for example). So naive use of straight ISA levels will
not allow an accurate description of the instruction set of any actual
implementation.

There really needs to be a separate configuration option for each
place where there is a choice of instructions, and to control these
individually. That way the TX39 can have ISA2 style interrupt returns
with ISA3 cache control.

-- 
Nick Garnett
Cygnus Solutions, a Red Hat Company
Cambridge, UK

  reply	other threads:[~2001-04-16  6:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-06-01  6:22 sun409
2000-06-01  9:23 ` Jurica Baricevic
2000-06-01 17:22   ` Jonathan Larmour
2001-04-16  6:34     ` Nick Garnett [this message]
2001-09-05  0:10       ` Nick Garnett

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