Index: hal_arm_lpc2xxx.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/lpc2xxx/var/current/cdl/hal_arm_lpc2xxx.cdl,v
retrieving revision 1.4
diff -u -r1.4 hal_arm_lpc2xxx.cdl
--- hal_arm_lpc2xxx.cdl	30 Jul 2007 18:09:47 -0000	1.4
+++ hal_arm_lpc2xxx.cdl	17 Aug 2007 15:40:10 -0000
@@ -157,6 +157,29 @@
             same as the processor clock."
     }
 
+    cdl_component CYGHWR_HAL_ARM_LPC2XXX_VIC {
+        display       "Vectored Interrupt Controller"
+        flavor        bool
+        calculated    1
+        description   "
+            This option enables or disables the Vectored Interrupt Controller.
+            The LPC2xxx eCos HAL supports up to 17 interrupt levels.
+            Interrupt levels 0 - 15 are vectored IRQs. Vectored IRQs 
+            have a higher priority then non vectored IRQs and they 
+            are processed faster. Non vectored IRQs are all chained together 
+            into one single slot and the ISR need to find out which interrupt 
+            occured."
+    
+        cdl_option CYGNUM_HAL_KERNEL_COUNTERS_CLOCK_ISR_DEFAULT_PRIORITY {
+	    display		"Default priority for system clock interrupts"
+	    flavor		data
+	    legal_values  { 0 to 16 }
+            default_value 0
+            description "The default value for the system clock interrupts is 0 - 
+                         this is the highest priority IRQ."
+        }
+    }
+
     cdl_component CYGNUM_HAL_RTC_CONSTANTS {
         display       "Real-time clock constants"
         flavor        none
@@ -206,20 +229,4 @@
            debugging via JTAG, as stopping the clock can prevent the
            debugger getting control of the system."
     }
-    
-    cdl_option CYGNUM_HAL_KERNEL_COUNTERS_CLOCK_ISR_DEFAULT_PRIORITY {
-	    display		"Default priority for system clock interrupts"
-	    flavor		data
-	    legal_values  { 0 to 16 }
-        default_value 0
-	    description "
-            The LPC2xxx eCos HAL supports up to 17 interrupt levels.
-            Interrupt levels 0 - 15 are vectored IRQs. Vectored IRQs 
-            have a higher priority then non vectored IRQs and they 
-            are processed faster. Non vectored  IRQs are all chained together 
-            into one single slot and the ISR need to  find out which interrupt 
-            occured. The default value for the system clock interrupts is 0 - 
-            this is the highest priority IRQ."
-    }
-
 }
Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/lpc2xxx/var/current/ChangeLog,v
retrieving revision 1.7
diff -u -r1.7 ChangeLog
--- ChangeLog	30 Jul 2007 18:09:47 -0000	1.7
+++ ChangeLog	17 Aug 2007 15:58:09 -0000
@@ -1,3 +1,8 @@
+2007-08-17  Hans Rosenfeld  <rosenfeld@grumpf.hope-2000.org>
+
+	* cdl/hal_arm_lpc2xxx.cdl: added VIC component to support
+	configuration of individual interrupt priorities
+
 2007_07-10  Uwe Kindler <uwe_kindler@web.de>
 
 	* cdl/hal_arm_lpc2xxx.cdl: Added option